Serial Peripheral Interface Module (SPI)
I/O Signals
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0 Advance Information
MOTOROLA Serial Peripheral Interface Module (SPI) 267
13.12.1 MISO (Master In/Slave Out)
MISO is one of the two SPI module pins that transmits serial data. In full
duplex operation, the MISO pin of the master SPI module is connected
to the MISO pin of the slave SPI module. The master SPI simu ltaneously
receives data on its MISO pin and transmits data from its MOSI pin.
Slave output data on the MISO pin is enabled only when the SPI is
configured as a slave. The SPI is configured as a slave when its
SPMSTR bit is logic 0 and its SS pin is at logic 0. To support a
multiple-slave system, a logic 1 on the SS pin puts the MISO pin in a
high-impedance state.
When enabled, the SPI controls data direction of the MISO pin
regardless of the state of the data direction register of the shared
I/O port.
13.12.2 MOSI (Master Out/Slave In)
MOSI is one of the two SPI module pins that transmits serial data. In
full-duplex operation, the MOSI pin of the master SPI module is
connected to the MOSI pin of the slave SPI module. The master SPI
simultaneously transmits data from its MOSI pin and receives data on its
MISO pin.
When enabled, the SPI controls data direction of the MOSI pin
regardless of the state of the data direction register of the shared
I/O port.
13.12.3 SPSCK (Serial Clock)
The serial clock synchronizes data transmission between master and
slave devices. In a master MCU, the SPSCK pin is the clock output. In a
slave MCU, the SPSCK pin is the clock input. In full-duplex operation,
the master and slave MCUs exchange a byte of data in eight serial clock
cycles.
When enabled, the SPI controls data direction of the SPSCK pin
regardless of the state of the data direction register of the shared
I/O port.