Clock Generator Module (CGM)
Functional Description
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0 Advance Information
MOTOROLA Clock Generator Module (CGM) 117
8.4.2.4 Programming the PLL
Use this 9-step procedure to program the PLL. Table 8-1 lists the
variables used and their meaning.
1. Choose the desired bus frequency, fBUSDES.
Example: fBUSDES = 8 MHz
2. Calculate the desired VCO frequency, fVCLKDES.
fVCLKDES = 4 x fBUSDES
Example: fVCLKDES = 4 x 8 MHz = 32 MHz
3. Using a reference frequency, fRCLK, equal to the crystal frequency,
calculate the VCO frequency multiplier, N. Round the result to the
nearest integer.
4. Calculate the VCO frequency, fVCLK.
Table 8-1. Variable Definitions
Variable Definition
fBUSDES Desired bus clock frequency
fVCLKDES Desired VCO clock frequency
fRCLK Chosen reference crystal frequency
fVCLK Calculated VCO clock frequency
fBUS Calculated bus clock frequency
fNOM Nominal VCO center frequency
fVRS Shifted FCO center frequency
fVCLKDES
fRCLK
N =
Example: N = 32 MHz
4 MHz = 8 MHz
fVCLK = N x fRCLK
Example: fVCLK = 8 x 4 MHz = 32 MHz