Advance Information MC68HC908MR16/MC68HC908MR32 — Rev. 4.0
118 Clock Generator Module (CGM) MOTOROLA
Clock Generator Module (CGM)
5. Calculate the bus frequency, fBUS, and compare fBUS with
fBUSDES.
6. If the calculated fBUS is not within the tolerance limits of the
application, select another fBUSDES or another fRCLK.
7. Using the value 4.9152 MHz for fNOM, calcul a te the VC O line ar
range multiplier, L. The linear range multiplier controls the
frequency range of the PLL.
8. Calculate the VCO center-of-range frequency, fVRS. The
center-or-range frequency is the midpoint between the minimum
and maximum frequencies attainable by the PLL.
fVRS = L x fNOM
Example: fVRS = 7 x 4.9152 MHz = 34.4 MHz
For proper operation,
CAUTION: Exceeding the recommended maximum bus frequency or VCO
frequency can crash the MCU.
9. Program the PLL registers accordingly:
a. In the upper four bits of the PLL programming register (PPG),
program the binary equivalent of N.
b. In the lower four bits of the PLL programming register (PP G),
program the binary equivalent of L.
fBUS = fVCLK
4
Example: N = 32 MHz
4 MHz = 8 MHz
Example: L = 32 MHz
4.9152 MHz = 7 MHz
L = round fVCLK
fNOM

(

)
fVRS – fVCLK | ≤fNOM
2