Advance Information MC68HC908MR16/MC68HC908MR32 — Rev. 4.0
40 Memory Map MOTOROLA
Memory Map
Similarly, some I/O bits are write only; the read function is
unimplemented. Reading of write-only I/O bits has no effect on MCU
operation. In register figures, the read function of write-only bits is
shaded.
2.4 Reserved Memory Locations
Some addresses are reserved. Writing to a reserved address can
have unpredictable effects on MCU operation. In the memory map,
Figure 2-1, and in the I/O register summary, Figure 2-2, reserved
addresses are marked with the word reserved.
Some I/O bits are reserved. Writing to a reserved bit can have
unpredictable effects on MCU operation. In register figures, reserved
bits are marked with the letter R.
2.5 I/O Section
Addresses $0000–$005F, shown in Figure 2-2, contain most of the
control, status, and data registers. Additional I/O registers have these
addresses:
• $FE00, SIM break status register (SBSR)
• $FE01, SIM reset status register (SRSR)
• $FE03, SIM break flag control register (SBFCR)
• $FE07, FLASH control register (FLCR)
• $FE0C, Break address register high (BRKH)
• $FE0D, Break address register low (BRKL)
• $FE0E, Break status and control register (BRKSCR)
• $FE0F, LVI status and control register (LVISCR)
• $FF7E, FLASH block protect register (FLBPR)
• $FFFF, COP control register (COPCTL)