Motorola MC68HC908MR16, MC68HC908MR32 - page 23

List of Figures
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0 Advance Information
MOTOROLA List of Figures 23
Figure Title Page
9-23 Dead-Time Insertion During OUTCTL = 1 . . . . . . . . . . . . .160
9-24 PWM Disable Mapping Write-Once
Register (DISMAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . .161
9-25 PWM Disabling Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . .162
9-26 PWM Disabling Decode Scheme. . . . . . . . . . . . . . . . . . . .163
9-27 PWM Disabling in Automatic Mode . . . . . . . . . . . . . . . . . .163
9-28 PWM Disabling in Manual Mode (Example 1) . . . . . . . . . .165
9-29 PWM Disabling in Manual Mode (Example 2) . . . . . . . . . .165
9-30 PWM Software Disable . . . . . . . . . . . . . . . . . . . . . . . . . . .166
9-31 PWMEN and PWM Pins. . . . . . . . . . . . . . . . . . . . . . . . . . .167
9-32 PWM Counter Register High (PCNTH) . . . . . . . . . . . . . . .168
9-33 PWM Counter Register Low (PCNTL) . . . . . . . . . . . . . . . .168
9-34 PWM Counter Modulo Register High (PMODH) . . . . . . . .169
9-35 PWM Counter Modulo Register Low (PMODL) . . . . . . . . .169
9-36 PWMx Value Registers High (PVALxH). . . . . . . . . . . . . . .170
9-37 PWMx Value Registers Low (PVALxL) . . . . . . . . . . . . . . .170
9-38 PWM Control Register 1 (PCTL1) . . . . . . . . . . . . . . . . . . .171
9-39 PWM Control Register 2 (PCTL2) . . . . . . . . . . . . . . . . . . .174
9-40 Dead-Time Write-Once Register (DEADTM) . . . . . . . . . . .176
9-41 PWM Disable Mapping
Write-Once Register (DISMAP). . . . . . . . . . . . . . . . . . .176
9-42 Fault Control Register (FCR) . . . . . . . . . . . . . . . . . . . . . . .177
9-43 Fault Status Register (FSR). . . . . . . . . . . . . . . . . . . . . . . .179
9-44 Fault Acknowledge Register (FTACK) . . . . . . . . . . . . . . . .180
9-45 PWM Output Control Register (PWMOUT) . . . . . . . . . . . .182
9-46 PWM Clock Cycle and PWM Cycle Definitions . . . . . . . . .184
9-47 PWM Load Cycle/Frequency Definition . . . . . . . . . . . . . . .184
10-1 Monitor Mode Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . .187
10-2 Monitor Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . .191
10-3 Sample Monitor Waveforms. . . . . . . . . . . . . . . . . . . . . . . .191
10-4 Read Transaction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .191
10-5 Break Transaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192
10-6 Monitor Mode Entry Timing . . . . . . . . . . . . . . . . . . . . . . . .197
11-1 TIMA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .201
11-2 TIM I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . .202
11-3 PWM Period and Pulse Width . . . . . . . . . . . . . . . . . . . . . .208