Motorola MC68HC908MR16, MC68HC908MR32 Figure 13-7. Transmission Start Delay (Master)

Serial Peripheral Interface Module (SPI)
Transmission Formats
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0 Advance Information
MOTOROLA Serial Peripheral Interface Module (SPI) 257
Figure 13-7. Transmission Start Delay (Master)
WRITE
TO SPDR INITIATION DELAY
BUS
MOSI
SPSCK
CPHA = 1
SPSCK
CPHA = 0
SPSCK CYCLE
NUMBER
MSB BIT 6
12
CLOCK
WRITE
TO SPDR
EARLIEST LATEST SPSCK = INTERNAL CLOCK ÷ 2;
EARLIEST LATEST
2 POSSIBLE START POINTS
SPSCK = INTERNAL CLOCK ÷ 8;
8 POSSIBLE START POINTS
EARLIEST LATESTSPSCK = INTERNAL CLOCK ÷ 32;
32 POSSIBLE START POINTS
EARLIEST LATESTSPSCK = INTERNAL CLOCK ÷ 128;
128 POSSIBLE START POINTS
WRITE
TO SPDR
WRITE
TO SPDR
WRITE
TO SPDR
BUS
CLOCK
BIT 5
3
BUS
CLOCK
BUS
CLOCK
BUS
CLOCK
INITIATION DELAY FROM WRITE SPDR TO TRAN SFER BEGIN