Philips P89LPC906, P89LPC907, P89LPC908

Philips Semiconductors User’s Manual - Preliminary -

P89LPC906/907/908

REVISION HISTORY

2003 Dec 8 103

16. REVISION HISTORY

2003 Dec 8

Initial release.

Contents

Main Table of Contents Table of Contents 6. Real-Time Clock/System Timer............................................................ 47 7. Power Monitoring Functions ................................................................. 53 8. UART (P89LPC907, P89LPC908)........................................................ 59 Page Page Page P89LPC906/907/908GENERAL DESCRIPTION 1. GENERAL DESCRIPTION PIN CONFIGURATIONS 8-Pin Packages P89LPC906 P89LPC907 P89LPC906/907/908GENERAL DESCRIPTION Logic Symbols PRODUCT COMPARISON The following table highlights differences between these three devices. P89 LPC906 P89LPC906/907/908GENERAL DESCRIPTION Page Page PIN DESCRIPTIONS - P89LPC906 PIN DESCRIPTIONS - P89LPC907 PIN DESCRIPTIONS - P89LPC908 Special function registers Page Page Table 2: Special function registers table - P89LPC907 Page Page Table 3: Special function registers table - P89LPC908 Page Page Page 2. CLOCKS OSCILLATOR OPTION SELECTION- P89LPC906 * CLOCK OUTPUT - P89LPC906 ON-CHIP RC OSCILLATOR OPTION WATCHDOG OSCILLATOR OPTION EXTERNAL CLOCK INPUT OPTION - P89LPC906 CPU CLOCK (CCLK) WAKEUP DELAY CPU CLOCK (CCLK) MODIFICATION: DIVM REGISTER LOW POWER SELECT (P89LPC906) Page Page 3. INTERRUPTS INTERRUPT PRIORITY STRUCTURE EXTERNAL INTERRUPT INPUTS EXTERNAL INTERRUPT PIN GLITCH SUPPRESSION Figure 3-1: Interrupt sources, enables, and Power down Wake-up sources - P89LPC906 Figure 3-2: Interrupts sources, enables, and Power down Wake-up sources - P89LPC907,P89LPC908 Page 4. I/O PORTS PORT CONFIGURATIONS QUASI-BIDIRECTIONAL OUTPUT CONFIGURATION OPEN DRAIN OUTPUT CONFIGURATION INPUT-ONLY CONFIGURATION PUSH-PULL OUTPUT CONFIGURATION PORT 0 ANALOG FUNCTIONS Page Page Page 5. TIMERS 0 AND 1 MODE 0 MODE 2 MODE 3 MODE 6 - P89LPC907 Page TIMER OVERFLOW TOGGLE OUTPUT - P89LPC907 Page 6. REAL-TIME CLOCK/SYSTEM TIMER REAL-TIME CLOCK SOURCE 23-bit down counter Reload on underflow 7-bit prescaler LSB Page CHANGING RTCS1-0 REAL-TIME CLOCK INTERRUPT/WAKE UP RESET SOURCES AFFECTING THE REAL-TIME CLOCK Page Page 7. POWER MONITORING FUNCTIONS BROWNOUT DETECTION Table 7-1: Brownout Options POWER-ON DETECTION POWER REDUCTION MODES Page Page Page Page 8. UART (P89LPC907, P89LPC908) MODE 0 MODE 1 MODE 2 MODE 3 SFR SPACE BAUD RATE GENERATOR AND SELECTION UPDATING THE BRGR1 AND BRGR0 SFRS FRAMING ERROR BREAK DETECT Page MORE ABOUT UART MODE 0 MORE ABOUT UART MODE 1 MORE ABOUT UART MODES 2 AND 3 FRAMING ERROR AND RI IN MODES 2 AND 3 WITH SM2 = 1 BREAK DETECT DOUBLE BUFFERING DOUBLE BUFFERING IN DIFFERENT MODES TRANSMIT INTERRUPTS WITH DOUBLE BUFFERING ENABLED (MODES 1, 2 AND 3) THE 9TH BIT (BIT 8) IN DOUBLE BUFFERING (MODES 1, 2 AND 3) Single Buffering (DBMOD/SSTAT.7 = 0), Early Interrupt (INTLO/SSTAT.6 = 0) is Shown MULTIPROCESSOR COMMUNICATIONS AUTOMATIC ADDRESS RECOGNITION Page Page RESET 9. RESET POWER-ON RESET CODE EXECUTION RESET 10. ANALOG COMPARATORS COMPARATOR CONFIGURATION INTERNAL REFERENCE VOLTAGE COMPARATOR INTERRUPT COMPARATOR AND POWER REDUCTION MODES + - COMPARATOR CONFIGURATION EXAMPLE Page KEYPAD INTERRUPT (KBI) 11. KEYPAD INTERRUPT (KBI) KEYPAD INTERRUPT (KBI) 12. WATCHDOG TIMER WATCHDOG FUNCTION FEED SEQUENCE Page Table 12-2: P89LPC906/907/908 Watchdog Timeout Values WATCHDOG TIMER IN TIMER MODE POWER DOWN OPERATION WATCHDOG CLOCK SOURCE Page Page ADDITIONAL FEATURES 13. ADDITIONAL FEATURES SOFTWARE RESET DUAL DATA POINTERS ADDITIONAL FEATURES P89LPC906/907/908 14. FLASH PROGRAM MEMORY GENERAL DESCRIPTION FEATURES INTRODUCTION TO IAP-LITE USING FLASH AS DATA STORAGE P89LPC906/907/908 Page ACCESSING ADDITIONAL FLASH ELEMENTS ERASE-PROGRAMMING ADDITIONAL FLASH ELEMENTS READING ADDITIONAL FLASH ELEMENTS Page Page USER CONFIGURATION BYTES USER SECURITY BYTES Boot Vector Boot Status 15. INSTRUCTION SET Page Page Page Page Page 17. INDEX Page Page Page Page Definitions Disclaimers Contact information