Philips P89LPC907, P89LPC908 Oscillator Option SELECTION- P89LPC906, Clock Output P89LPC906

Philips Semiconductors	User’s Manual - Preliminary -
CLOCKS	P89LPC906/907/908

Quartz crystal or ceramic resonator

The oscillator must be configured in one of the following modes:

-Low Frequency Crystal

-Medium Frequency Crystal

-High Frequency Crystal

*A series resistor may be required to limit crystal drive levels. This is especially

important for low frequency crystals.

	P89LPC906
	XTAL1
*	XTAL2

Figure 2-1: Using the Crystal Oscillator - P89LPC906

OSCILLATOR OPTION SELECTION- P89LPC906

The oscillator option is selectable either by the FOSC2:0 bits in UCFG1 or by the RTCS1:0 bits in RTCCON. If the FOSC2:0 bits select an OSCCLK source of either the internal RC oscillator or the WDT oscillator, then the RTCS1:0 bits will select the oscillator option for the crystal oscillator. Otherwise, the crystal oscillator option is selected by FOSC2:0. See Table 6-1 and Table 6-2.

CLOCK OUTPUT - P89LPC906

The P89LPC906 supports a user selectable clock output function on the XTAL2 / CLKOUT pin when no crystal oscillator is being used. This condition occurs if another clock source has been selected (on-chip RC oscillator, watchdog oscillator, external clock input on X1) and if the Real-Time clock is not using the crystal oscillator as its clock source. This allows external devices to synchronize to the P89LPC906. This output is enabled by the ENCLK bit in the TRIM register

The frequency of this clock output is 1/2 that of the CCLK. If the clock output is not needed in Idle mode, it may be turned off prior to entering Idle, saving additional power. Note: on reset, the TRIM SFR is initialized with a factory preprogrammed value. Therefore when setting or clearing the ENCLK bit, the user should retain the contents of bits 5:0 of the TRIM register. This can be done by reading the contents of the TRIM register (into the ACC for example), modifying bit 6, and writing this result back into the TRIM register. Alternatively, the "ANL direct" or "ORL direct" instructions can be used to clear or set bit 6 of the TRIM register.Increasing the TRIM value will decrease the oscillator frequency.

ON-CHIP RC OSCILLATOR OPTION

The P89LPC906/907/908 has a 6-bit field within the TRIM register that can be used to tune the frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory pre-programmed value to adjust the oscillator frequency to 7.373 MHz, ±1%. (Note: the initial value is better than 1%; please refer to the datasheet for behavior over temperature). End user applications can write to the TRIM register to adjust the on-chip RC oscillator to other frequencies. Increasing the TRIM value will decrease the oscillator frequency.

If CCLK is 8MH or slower, the CLKLP SFR bit (AUXR1.7) can be set to ’1’ to reduce power consumption. On reset, CLKLP is ’0’ allowing highest performance access. This bit can then be set in software if CCLK is running at 8MHz or slower

WATCHDOG OSCILLATOR OPTION

The watchdog has a separate oscillator which has a nominal frequency of 400KHz. This oscillator can be used to save power when a high clock frequency is not needed.

2003 Dec 8 26