C.1.2.1

U2P ASIC

 

The UPT-to-PCI bridge (U2P) ASIC controls the PCI buses. It forms the bridge from

 

the UPA bus to the PCI buses. For a brief description of the U2P ASIC, see Section

 

C.1.12 “ASICs” on page 271.

C.1.2.2 Symbios 53C876 SCSI Controller

The Symbios 53C876 SCSI controller provides electrical connection between the main logic board and the internal and external SCSI buses to the PCI bus. The Symbios controller is two SCSI controllers on the same PCI slot. Controller “A” is used to interface to internal devices. The second controller, controller “B,” is used to interface to external devices.

C.1.2.3

PCIO ASIC

 

The PCI-to-EBus/Ethernet controller (PCIO) ASIC bridges the PCI bus to the EBus,

 

enabling communication between the PCI bus and all miscellaneous I/O functions,

 

as well as the connection to slower on-board functions. The PCIO ASIC also embeds

 

the Ethernet controller.

C.1.3 UltraSPARC II Processor

The UltraSPARC II processor is a high-performance, highly-integrated superscalar processor implementing the SPARC-V9 64-bit RISC architecture. The UltraSPARC II processor is capable of sustaining the execution of up to four instructions per cycle even in the presence of conditional branches and cache misses. This sustained performance is supported by a decoupled prefetch and dispatch unit with instruction buffer.

The UltraSPARC II processor supports both 2D and 3D graphics, as well as image processing, video compression and decompression, and video effects through the sophisticated visual instruction set (VIS). VIS provides high levels of multimedia performance, including real-time video compression/decompression and two streams of MPEG-2 decompression at full broadcast quality with no additional hardware support. The UltraSPARC II processor provides a 2-Mbyte ecache, with an 300-MHz operating frequency.

UltraSPARC II processor characteristics and associated features include:

SPARC-V9 architecture compliant

Binary compatible with all SPARC application code

4Multimedia capable visual instruction set (VIS) Multiprocessing support

254 Sun Enterprise 220R Server Service Manual January 2000, Revision A

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Sun Microsystems 220R service manual UltraSPARC II Processor, 2.1, Symbios 53C876 Scsi Controller, 2.3