
Troubleshooting
Table 4-1 Fault Codes
Error |
| Fault Type |
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| H=Hardware |
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Code | Fault Source(s) | S=Software | Fault Description | Possible Causes | ||
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0047 | Software Test | S | This fault indicates that the PV100S |
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| has detected that a software test fault |
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| has occurred. This is a simulated fault |
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| used for debugging purposes. |
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0048 | Bad Memory | S | This fault indicates that the PV100S | • | Internal SRAM error | |
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| has detected that the SRAM DIMM | • | CPU error | |
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| on the CCU2 controller board has |
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| failed. The CCU2 performs a series |
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| of tests to confirm the validity of the |
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| SRAM, and the memory module has |
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| produced errors. |
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XX52 | Matrix Gate | S | The CCU2 controller sends digitized | • | ||
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| timing signals for gating the IGBT’s |
| loose or disconnected | |
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| via the IPM driver board and bi- | • PS1 ±15 Vdc Power | ||
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| directional fiber optic |
| Supply is defective | |
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| communication. This fault indicates | • P1 on IPM driver board | ||
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| that the PV100S has detected that an |
| is loose or disconnected | |
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| IGBT gate drive fault has occurred. | • | IPM internal error | |
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| An internal protection circuit within |
| condition | |
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| the individual IPM devices of the |
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| IGBT matrix also generates a gate |
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| fault as the result of either short |
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| circuit, over current, over |
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| temperature, or an under voltage |
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| condition. |
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| The first two digits of the fault code |
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| indicate the particular IGBT that |
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| reported the fault, as follows: |
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| • | 0152 (A+) |
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| • | 0252 |
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| • | 0452 (B+) |
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| • | 0852 |
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| • | 1052 (C+) |
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| • | 2052 |
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If more than one IGBT faults simultaneously, the two first digits are added in hexadecimal form to indicate that the gate drive fault has occurred in more than one phase, thus the error code will contain the summation of the faulted phases.
152379 Rev C |