Chapter 5: Reference

The Sampling Tab

“In Either Timing Mode or State Mode” on page 53

How Samples are Stored in Transitional Timing

In the timing mode's 400 MHz / 32M Sample Transitional or Store Qualified configuration, with the exception of the first sample, the logic analyzer must store two samples (four when sampling at 2.5 ns) so that no data is lost during the time it takes for the edge detectors to reset. This affects the number of transitions that can be stored in a given amount of logic analyzer memory.

When transitions occur more than two sample periods apart, only half of the logic analyzer memory will contain samples with transitions. This is illustrated below at time tags 2, 5, 7, 14, and 17. This is the minimum number of transitions that will be stored.

 

When transitions occur at every sample period, all of the logic analyzer

 

memory contains samples with transitions (even though edges were

 

only detected at every other sample). This is illustrated above at time

 

tags 18, 19, 20, and 21. This is the maximum number of transitions that

 

will be stored.

 

When transitions occur at a varied rate, sometimes at every sample

 

period and other times more than two sample periods apart,

 

somewhere between half and all of the logic analyzer memory contains

 

samples with transitions.

See Also

“To select the conventional/transitional configuration” on page 44

 

“To specify default storing” on page 76

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Agilent Technologies 16760A How Samples are Stored in Transitional Timing, Will be stored, Samples with transitions, 157