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Chapter 2: Probing and Selecting the Sampling Mode
Choosing the Sampling Mode
• 800 Mb/s / 64M State
In this configuration: The input clock signal can be periodic or
aperiodic, and either rising, falling, or both edges can indicate valid
data. The logic analyzer setup/hold window is 1 ns, and sampling
positions may be adjusted automatically or manually. The limited set of
16760 State trigger functions are available.
• 400 Mb/s / 32M State
In this configuration: Either rising, falling, or both edges can indicate
valid data. The logic analyzer setup/hold window is 2.5 ns, and sampling
positions may be adjusted automatically or manually. The limited set of
Turbo State trigger functions are available.
• 200 Mb/s / 32M State
In this configuration: Rising, falling, or both edges can indic ate valid
data. The logic analyzer setup/hold window is 3.0 ns, and sampling
positions may be adjusted automatically or manually. The General
State trigger functions are available.
In all configurations but the 200 Mb/s / 32M State configuration, if time is
counted (that is time tags are being stored), one pod must be left
unassigned in order to store the time tags. In the 200 Mb/s / 32M State
configuration, memory depth is reduced by half if all pods are used and
time or state counts are being stored.
See Also “To set up the sampling clock” on page48
“To manually adjust sampling positions” on page 52
“To automatically adjust sampling positions” on page 49
“Trigger Functions Subtab” on page 177
To set up the sampling clock

For the clock input signal that will be used:

1. In the Clock Setup, select the desired Mode. Your choices are Periodic or
Aperiodic. If the State Mode is set to 1250 or 1500 Mb/s configuration, the
input clock must be Periodic.
2. Select the pod's Master button (under the activity indicator).