Anritsu 682XXB, 683XXB manual 2-3

inputs are coupled directly via coaxial cables to
their destination PCBs—the FM input to A11FM
PCB and the Pulse/Triggerinput to the A6 Pulse
Generator PCB.
The rear panel connectors, 10 MHz REF OUT,
10 MHz REF IN, and FM IN, are coupled directly to
PCBs via coaxial cables—10 MHz REF OUT and
10 MHz REF IN to the A3 Reference Loop PCB and
FM IN to the A11FM PCB. The rear panel connec-
tors, PULSE TRIGGER IN,PULSE SYNC OUT,and
PULSE VIDEO OUT,are coupled via the A21-1 PCB
and coaxial cables directly to the A6 Pulse Genera-
tor PCB. The rear panel IEEE-488 GPIB and SERIAL
I/O connectors are connected to the A17 CPU PCB
via the A20 Motherboard PCB.
Motherboard/
Interconnec-
tions
The A20 Motherboard PCB and associated cables
provide the interconnections for the flow of data,
signals, and DC voltages between all internal com-
ponents and assemblies throughout the 682XXB/
683XXB.
2-3 FREQUENCY SYNTHESIS The frequency synthesis subsystem provides phase-lock control of the
682XXB/683XXB output frequency.It consists of four phase-lock loops,
the Reference Loop, the Coarse Loop, the Fine Loop, and the YIG
Loop. The four phase-lock loops, operating together,produce an accu-
rately synthesized, low-noise RF output signal. Figure 2-2 (page 2-11)
is an overall block diagram of the frequency synthesis subsystem. The
following paragraphs describe phase-lock loops and the overall opera-
tion of the frequency synthesis subsystem.
Phase-Lock
Loops The purpose of a phase-lock loop is to control the
frequency of a variable oscillator in order to give it
the same accuracy and stability as a fixed reference
oscillator.It works by comparing two frequency in-
puts, one fixed and one variable, and by supplying a
correction signal to the variable oscillator to reduce
the difference between the two inputs. For example,
suppose we have a 10 MHz reference oscillator with
a stability of1x10
–7/day,and we wish to transfer
that stability to a voltage controlled oscillator
(VCO). The 10 MHz reference signal is applied to
the reference input of a phase-lock loop circuit. The
signal from the VCO is applied to the variable input.
Aphase detector in the phase-lock loop circuit com-
pares the two inputs and determines whether the
variable input waveform is leading or lagging the
reference. The phase detector generates a correction
682XXB/683XXB MM 2-9
FUNCTIONAL FREQUENCY
DESCRIPTION SYNTHESIS
NOTE
When Option 6 (phase modulation)
isinstalled, the front panel and rear
panelFM IN connectors also serve as
the FM IN connectors.