Bradley Smoker PLC-5 user manual Design Considerations, 18-4Using Processor Input Interrupts

18-4Using Processor Input Interrupts

IMPORTANT

When the controller runs an PII with a block-transfer instruction to a remote chassis, the MCP resumes processing while waiting for the block-transfer to complete unless a UIE/UID instruction pair is used.

PII configuration changes are not put into effect until the controller goes from program to run or test mode.

Design Considerations

Consider the following guidelines when planning PIIs.

•Do not use 2-slot addressing when using PIIs.

•Do not use 1771-IG or -IGD, 8- and 16-point TTL modules for the PII. Use the 1771-IQ16 input module instead. Since the module’s input delay filter is selectable, you can set the delay to 0 or about 200 ms.

•Avoid using a block-transfer module in the controller-resident rack with a PII configured because you could miss an input pulse while a block-transfer of data is in progress. However, if you need to use block-transfers, make sure that a PII input pulse is at least 400 ms, which causes the block-transfer not to affect the PII.

•Online editing affects the performance of a PII routine. A PII cannot interrupt the controller while it is managing its memory due to the online edits being made. The PII input must be on for an amount of time slightly greater than the actual time required to complete the online edits. If not, the PII does not execute.

•Clear S:51 in one of two ways:

–using a CLR instruction (see ²)

–placing a MOV (move) instruction on the last rung in the PII file. Move a 0 into S:51 to reset the PII bits before finishing the PII file.

IMPORTANT

If S:51 is not cleared, a PII overlap bit is set on that status page, causing a minor fault.

Publication 1785-UM012D-EN-P - July 2005