Canon FY8-13EX-000, NP6218 service manual Switching the Static Eliminator Bias Voltage Level, 4-17

CHAPTER 4 IMAGE FORMATION SYSTEM

2. Switching the Static Eliminator Bias Voltage Level

The microprocessor (Q512) on the composite power supply PCB generates the JCTL signal (analog signal) under the control of the DC controller PCB. In response, the secondary side of the main transformer (T101) turns on to generate a bias for the static eliminator with the help of the main transformer (T101).

The output of voltages (2.5 kV, 4.0 kV) is switched by the JLVCTL signal.

When the JCTL signal turns on, the drive circuit turns on to generate the static eliminator bias.

3. Ensuring Proper Separation of Thin Paper

Under some environmental conditions, thin paper can fail to separate at times.

To ensure proper separation, the voltage applied to the static eliminator may be permanently set to 4.0 kV.

To do this, use service mode No. 506 (separation static eliminator output voltage; see p. 10-107).

COPYRIGHT © 1997 CANON INC. CANON NP6218 REV. 0 MAY 1997 PRINTED IN JAPAN (IMPRIME AU JAPON) 4-17