A-5
Cisco MGX 8230 Edge Concentrator Installation and Configuration
Release 1.1.31, Part Number 78-11215-03 Rev. B0, May 2001
AppendixA Technical Specifications MGX 8230 Processor Switching Module Specifications
Trunk history counters: Ingress, per connectio n:
Number of received cells with CLP =0 .
Number of received cells with CLP =1 .
Egress, per connection :
Number of received cells.
Number of transmitted cell s.
Number of received cells with EF C I b it set.
Number of transmitted ce ll s w it h EFCI bit set.
Connection capacities
supported by PXM: Maximum number of connecti on s:
16,000 bi-directional channels for local switching.
32,000 bi-directional channels for switching across uplink
card.
Maximum aggregate bandwidth:
600 Mbps local switching ( ser vi ce m odu le to service
module).
1,200 Mbps switching across uplink.
Cell memory: 256K cells.
Processor clock speed
and memory specifics: Clock speed: 200 MHz interna l, 50 M h z ex ter n al.
Flash memory: 2 Mbytes.
DRAM: 64 Mbytes, upgradeable to 128 Mbytes.
Secondary cache: 512 Kbytes.
BRAM: 128 Kbytes.
Hard disk: 4 Gbytes.
Alarm indicators
(audible and visual): Central office-compatible alarm indicators and controls
through a DB15 connector.
Maintenance features: Internal isolation loopback.
External remote loopback.
Hot-pluggable.
Card dimensions: Front card: 15.65 inches by 16.83 inches (39.75 cm by 42.75
cm).
Back cards: 7.25 inches by 4.125 inches (18.42 cm by 10.48
cm).
Power: Requires –48 VDC, dissipates 100 W.
TableA-2 PXM Specifications (continued)
Category Description