Overview Physical Memory Map | Emerson PMPPC7448 specs

Overview: Physical Memory Map

PHYSICAL MEMORY MAP

Fig. 1-1illustrates the PmPPC7448 memory map:

Figure 1-2:PmPPC7448 Memory Map

Hex Address

FFFF,FFFF

FF80,0000

F854,0000

F850,0000

F830,0000

F820,0000

F810,0000

F800,0000

EBFF,FFFF

E9FF,FFFF

E800,0000

C000,0000

B000,0000

8000,0000

3FFF,FFFF

1FFF,FFFF

0FFF,FFFF

0000,0000

Boot Mirror

Reserved

MV64460 SRAM

Reserved

CPLD

MV64460

ROM Socket

	Reserved

			Flash
Flash			64 MB
32 MB

	Reserved

	I/O
	PCI 0
	Memory

				SDRAM
	Reserved			2 GB

		SDRAM
	SDRAM	1 GB
SDRAM	512 MB
256 MB

Hex Address

F820,E000

F820,D000

F820,C000

F820,B000

F820,A000

F820,9000

F820,8000

F820,7000

F820,6000

F820,5000

F820,4000

F820,3000

F820,2000

F820,1000

F820,0000

PCI Reset Out Enable Register

DMC LED Register

Board Configuration Register 3

Reserved

Board Configuration Register 1

Board Configuration Register 0

PLD Version Register

Hardware Version Register

Jumper Settings Register

EREADY Register

Product ID Register

Interrupt Pending Register

Interrupt Enable Register

Reset Command Register

Reset Event Register

1-4

PmPPC7448 User’s Manual

10006757-02

Image 18

Emerson PMPPC7448 user manual Overview Physical Memory Map, Physical Memory MAP

Contents

PmPPC7448 PowerPC-Based Processor PMC Module Revision Level Principal Changes Date Regulatory Agency Warnings & Notices FCC Rules and Regulations PartEMC Compliance Manufacturer’s Name ProductModel Name/Number Contents Contents Acronyms Blank Figures Viii Tables Blank Registers Xii Components and Features Overview Overview Components and Features Development Mezzanine Card DMC Overview Functional Overview Functional Overview Overview Physical Memory Map Physical Memory MAP Hex Physical Access Address Mode Description See EBFF,FFFF Additional Information Type SpecificationOverview Additional Information Product Certification UL Certification EMC Technical References RoHS ComplianceTerminology and Notation Device / Interface Document Intel StrataFlash Embedded Memory P30 Datasheet Document Device / Interface Blank PMPPC7448 Circuit Board SetupElectrostatic Discharge Width Depth Height top side Height bottom side Setup PmPPC7448 Circuit Board C325 PLD Connectors P14 LEDs 3LED Locations, Bottom Front Panel Front Panel Reset Switch Setup PmPPC7448 Setup PMPPC7448 Setup Risk of damage to the board Power RequirementsEnvironmental Considerations Environment Range Relative Humidity Installing the Module PMC Setup Troubleshooting TroubleshootingBaseboard Technical Support Product Repair 8Serial Number and Product ID on Bottom Side Setup Troubleshooting Category MPC7448 Key Features Central Processing Unit Processor Reset Register Default After Initialization HexProcessor Initialization Central Processing Unit Processor Initialization Hardware Implementation Dependent 0 Register Central Processing Unit Processor Initialization Hardware Implementation Dependent 1 Register Central Processing Unit Exception Handling Exception Handling Post-Instruction Execution Priority Exception Central Processing Unit Exception Processing Exception ProcessingMachine State Register FE0 FE1 FP Exception Mode Central Processing Unit Cache Memory Cache MemoryL1 Cache L2 Cache Central Processing Unit Cache Memory Jumper Function Options Default Configuration On-Card Memory ConfigurationBoot Memory Configuration User Flash On-Card Memory Configuration On-Card Sdram ON-CARD SdramNvram Allocation On-Card Memory Configuration Nvram Allocation Window SizeAddress Offset hex Name Bytes Blank System Controller XOR CPU Interface Registers System Controller CPU InterfaceCPU Interface Memory Interface System Controller Device Controller Interface Internal SramDevice Controller Interface Device Control Registers Timer/CounterSystem Controller Internal Idma Controller Internal Idma Controller PCI Subsystem Device and Vendor ID Assignment PCI Configuration SpaceSystem Controller PCI Interface PCI Read/Write Sdram Size System Controller PCI Bus Control Signals PCI BUS Control SignalsPCI Interface Registers Eready Ready PRESENT* Present Pin P11 Signal P12 Signal System Controller PMC Connector PinoutsPMC Connector Pinouts P11 and P12 Pin Assignments Pin P13 Signal P14 Signal P13 and P14 Pin Assignments PMC Connector 6PMC Connector Outbound Doorbells System Controller Doorbell RegistersDoorbell Registers Inbound Doorbells System Controller 66 MHz Bus Operation Watchdog TimerReset MHZ BUS Operation Ethernet Interface MV64460 Ethernet Registers Ethernet Interface Ethernet Address Ethernet AddressEthernet Connection P1 Cable may result in a disconnection Pin SignalEthernet Interface Ethernet Connection P1 Mini-B USB Pin Description RJ45 Pin Blank Reset Command Register RCR Reset RegistersReset Event Register RER Cpld Cpld Reset Registers SCL Cpld Interrupt Registers Interrupt Registers Interrupt Enable Register IER Interrupt Pending Register IPR Eready Register Erdy Cpld Product ID Register PIRProduct ID Register PIR Revision Registers Hardware Version Register HVR Cpld Board Configuration RegistersBoard Configuration Registers PLD Version Register PVR Reserved Boot Blank MULTI-PROTOCOL Serial Controllers Mpsc BRGx Configuration RegisterSerial Input/Output Serial DMA Sdma Channels I2C Interface BRGx Tuning RegisterSerial Input/Output I2C Interface Connection Serial Input/Output I/O Connection Mini-USB Pin Description DB9 Pin Blank Block Diagram Real-Time ClockOperation Real-Time Clock Clock Operation Clock OperationAddress Data Function/Range Don’t care bit Blank Development Mezzanine Card DMC Circuit Board Development Mezzanine Card DMC Circuit Board Serial Numbers Development Mezzanine Card Connectors ConnectorsP1 Connector Pin Assignments OUT Dmcoe 3DMC P2 Mini-USB Connector P2 EIA-232 Interface Development Mezzanine Card PmPPC7448 to DMC Jtag PMPPC7448 to DMC JtagP3 JTAG/COP P4 Jtag Chain Header 6DMC P4 Jtag Chain Header Development Mezzanine Card DMC Jumpers JP1 DMC Jumpers JP1 Jumper Setting Register Development Mezzanine Card Debug/Status LEDsDEBUG/STATUS Leds Development Mezzanine Card DMC Setup DMC SetupInstalling the DMC Card DMC Location on PmPPC7448 Development Mezzanine Card Troubleshooting 10-14 COMMAND-LINE Features Monitor Power-up/Reset Sequence Monitor Basic OperationBasic Operation 2Power-up/Reset Sequence Flowchart Monitor Recovery and Updates Monitor Monitor Recovery and UpdatesPost Diagnostic Results Recovering the Monitor Updating the Monitor via Tftp Restoring the PmPPC7448 Monitor Using the KatanaQP PCI1 Resetting Environment Variables Verify that the checksum is correct Monitor Accessing the Console Over Ethernet Accessing the Console Over EthernetMonitor Command Reference Monitor Boot Commands Boot Commands Bootp BootelfBootm Bootv Monitor Memory Commands Memory Commands Find Definition mm .b, .w, .l address Erase Monitor Flash CommandsFlash Commands Flinfo Protect Monitor EEPROM/I2C CommandsEEPROM/I2C Commands Eeprom Imd Icrc32Iloop Imm Monitor Environment Parameter Commands Environment Parameter CommandsTest Commands Monitor Other Commands Other Commands Echo Crc32Date Enumpci Isdram HelpIminfo Loop Pci PingRun Monitor Environment Variables Environment Variables Bootfile Variable Description Binary Monitor TroubleshootingDownload Formats Motorola S-Record 11-26 GbE AcronymsCPSB PrPMC RMA Contents, table Cpld registers -1 to Index Index 11-17 UL certifications Blank 10006757-02 E R S O N. C O N S I D E R I T S O L V E D