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Emerson PMPPC7448 user manual Overview: Components and Features, Development Mezzanine Card DMC

Models: PMPPC7448

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Overview: Components and Features

Overview: Components and Features

Note: GbE ports (0 and 1) are routed through the PHYs directly to connector P14. Therefore, magnetics are required on the Rear Transition Module (RTM) or baseboard.

CPLD: The PmPPC7448 uses a Complex Programmable Logic Device (CPLD) to implement various memory-mapped registers and to control access to the Flash, ROM socket, and enumera- tion of Monarch/non-Monarch systems.

RTC: The real-time clock is an ST®Microelectronics M41T00 Serial Access Timekeeper®.

Development Mezzanine Card (DMC):

The DMC is a custom, optional plug-on card mounted on the back of the PmPPC7448. This card facilitates hardware and software development. See Chapter 10.

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PmPPC7448 User’s Manual

10006757-02

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Emerson PMPPC7448 user manual Overview: Components and Features, Development Mezzanine Card DMC

Contents

PmPPC7448: PowerPC-BasedProcessor PMC Module User’s ManualPrincipal Changes Revision LevelDate FCC RULES AND REGULATIONS — PART Regulatory Agency Warnings & NoticesEMC COMPLIANCE Regulatory Agency Warnings & Noticescontinued Manufacturer’s NameProduct Model Name/NumberContents 2 Setup4On-CardMemory Configuration 1 OverviewContentscontinued 8 Serial Input/Output9 Real-TimeClock 10Development Mezzanine Card12 Acronyms ContentscontinuedPmPPC7448 User’s Manual blank page10006757-02 Figures blank page viiiPmPPC7448 User’s Manual 10006757-02Tables PmPPC7448 User’s Manual blank page10006757-02 Registers PmPPC7448 User’s Manual blank page10006757-02 COMPONENTS AND FEATURES OverviewSection System Controller/PCI BridgeOverview: Components and Features Development Mezzanine Card DMCOverview: Functional Overview FUNCTIONAL OVERVIEWFront Panel Development Mezzanine Card DMCOverview: Physical Memory Map PHYSICAL MEMORY MAPHex Address MemoryAccess Hex PhysicalAddress ModeSpecification Overview: Additional InformationADDITIONAL INFORMATION Product CertificationUL Certification SpecificationOverview: Additional Information TypeRoHS Compliance Terminology and NotationTechnical References Device / Interfacecontinued Overview: Additional InformationDocument: Device / Interfaceblank page 1-10PmPPC7448 User’s Manual 10006757-02Setup ELECTROSTATIC DISCHARGEPMPPC7448 CIRCUIT BOARD WidthSetup: PmPPC7448 Circuit Board C279 Setup: PmPPC7448 Circuit BoardConnectors Setup: PmPPC7448 Circuit BoardLEDs Setup: PmPPC7448 Circuit BoardReset SW1 Front PanelEthernet Serialthe switch ResetSetup: PmPPC7448 Circuit Board Setup: PmPPC7448 Setup PMPPC7448 SETUPPower Requirements Watt Requirements/ConfigurationEnvironmental Considerations risk of damage to the boardSetup: PmPPC7448 Setup Installing the ModulePmPPC7448PmPPC7448 BottomsideBottomside TROUBLESHOOTING Setup: Troubleshootingbaseboard Technical Support Setup: TroubleshootingProduct Repair Setup: TroubleshootingSerial Number Product IDEmerson Network Power, Embedded Computing Test and Repair Services Department8310 Excelsior Drive Madison, WI RMA #____________MPC7448 Key Features Central Processing UnitCategory SectionPROCESSOR RESET Default After Initialization HexPROCESSOR INITIALIZATION RegisterCentral Processing Unit:Processor Initialization Hardware Implementation Dependent 0 RegisterXAE: Extended Addressing Enabled Central Processing Unit:Processor InitializationHRESET Hardware Implementation Dependent 1 RegisterHID1ECLK HID1BCLKCentral Processing Unit:Exception Handling EXCEPTION HANDLINGHRESET HID1ECLKInstruction Dispatch/Execution Post-InstructionExecutionPriority ExceptionCentral Processing Unit:Exception Processing EXCEPTION PROCESSINGMachine State Register Notes: continuedFP Exception Mode Central Processing Unit:Exception ProcessingCACHE MEMORY L1 Cache Central Processing Unit:Cache MemoryFP Exception Mode: continued L2 Cache Central Processing Unit:Cache MemoryL2HWF: L2 Hardware Flush 0Flush disabled Central Processing Unit:Cache MemoryOn-CardMemory Configuration BOOT MEMORY CONFIGURATIONDefault Configuration USER FLASHON-CARDSDRAM On-CardMemory Configuration:On-CardSDRAMNVRAM ALLOCATION On-CardMemory Configuration:NVRAM Allocation Window SizeAddress Offset hex NamePmPPC7448 User’s Manual blank page10006757-02 System Controller SectionSystem Controller: CPU Interface CPU INTERFACECPU Interface Registers MEMORY INTERFACE DDR SDRAM ControllerInternal SRAM System Controller: Device Controller InterfaceDEVICE CONTROLLER INTERFACE Timer/Counter System Controller: Internal IDMA ControllerDevice Control Registers INTERNAL IDMA CONTROLLERPCI Configuration Space System Controller: PCI InterfacePCI Subsystem Device and Vendor ID Assignment PCI Read/WriteSystem Controller: PCI Interface SDRAM SizeMax SDRAM Size SDRAM SizeSystem Controller: PCI Bus Control Signals PCI BUS CONTROL SIGNALSPCI Interface Registers AD31:00C/BE7:4 EREADY: READYGNT*: GRANT INTA*, INTB*, INTC*, INTDRESET_OUT*: RESET OUTPUT PRESENT*: PRESENTSERR STOP*: STOPSystem Controller: PMC Connector Pinouts PMC CONNECTOR PINOUTSP11 Signal P12 SignalP13 Signal P14 SignalP13 and P14 Pin Assignments System Controller: PMC Connector PinoutsPMC Connector System Controller: PMC Connector PinoutsP13 Signal P14 SignalSystem Controller: DoorbellRegisters DOORBELL REGISTERSOutbound Doorbells Inbound DoorbellsWATCHDOG TIMER RESETSystem Controller: 66 MHz Bus Operation 66 MHZ BUS OPERATIONMV64460 ETHERNET REGISTERS Ethernet InterfaceSection Ethernet Interface: Ethernet Address ETHERNET ADDRESSETHERNET CONNECTION P1 00 80 F9 xx yy zzSignal Ethernet Interface: Ethernet Connection P1cable may result in a disconnection Mini-BUSB PinPmPPC7448 User’s Manual blank page10006757-02 RESET REGISTERS Reset Event Register RERReset Command Register RCR CPLDCPLD:Reset Registers CPLD:Interrupt Registers INTERRUPT REGISTERSInterrupt Pending Register IPR Interrupt Enable Register IERCPLD:Interrupt Registers CPLD:Product ID Register PIR PRODUCT ID REGISTER PIREREADY REGISTER ERDY REVISION REGISTERSCPLD:Board Configuration Registers BOARD CONFIGURATION REGISTERSHardware Version Register HVR PLD Version Register PVRCPLD:Board Configuration Registers 0 DMC is not installedPmPPC7448 User’s Manual blank page10006757-02 BRGx Configuration Register MPSCx Main Configuration RegistersSerial Input/Output MULTI-PROTOCOLSERIAL CONTROLLERS MPSCBRGx Tuning Register Serial Input/Output: I2C InterfaceI2C INTERFACE I/O CONNECTIONSerial Input/Output: I/O Connection Mini-USBPinDescription:2 DB9 PinPmPPC7448 User’s Manual blank page10006757-02 BLOCK DIAGRAM Real-TimeClockOPERATION SectionReal-TimeClock: Clock Operation CLOCK OPERATIONData Function/RangeReal-TimeClock: Clock Operation ST: Stop bit 1=Stops the oscillatorPmPPC7448 User’s Manual blank page10006757-02 Development Mezzanine Card DMC CIRCUIT BOARDSection WidthDevelopment Mezzanine Card:DMC Circuit Board Serial NumbersDevelopment Mezzanine Card:Connectors CONNECTORSP1 Connector Pin Assignments SignalDevelopment Mezzanine Card:Connectors SignalSignal 3.3V: 3.3 V is the power supply to the DMC analogCPU_VIO MPC7448_TCK DMC_BOOT_SRC DMC_JP4:3,1 MPC7448_TMS DEBUG_SRESET DEBUG_HRESETDMC_OE WE0 LA17:2 BADDR2:0 AD7:0 FILT_TX FILT_RX LED4:1 MPC7448_TDO MPC7448_TDI DEBUG_TRSTP2 EIA-232Interface Development Mezzanine Card:ConnectorsSignal SignalDevelopment Mezzanine Card:PmPPC7448 to DMC JTAG PMPPC7448 TO DMC JTAGP3 JTAG/COP MPC7448HRESETP4 JTAG Chain Header SignalSignal Development Mezzanine Card:PmPPC7448 to DMC JTAGDevelopment Mezzanine Card:DMC Jumpers JP1 DMC JUMPERS JP1Signal SignalDevelopment Mezzanine Card:Debug/Status LEDs Jumper Setting RegisterDEBUG/STATUS LEDS DMC SETUP Development Mezzanine Card:DMC SetupInstalling the DMC Card Development Mezzanine Card:DMC Setup FigureDMC Location on PmPPC7448 RJ45Development Mezzanine Card:Troubleshooting TROUBLESHOOTINGTechnical Support Product RepairEmerson Network Power Development Mezzanine Card:TroubleshootingTest and Repair Services Department 8310 Excelsior Drive Madison, WIMonitor COMMAND-LINEFEATURESSection Monitor: Basic Operation Power-up/ResetSequenceBASIC OPERATION Monitor: Basic Operation 10006757-0211-3 baudrateMonitor: Monitor Recovery and Updates POST Diagnostic ResultsMONITOR RECOVERY AND UPDATES Recovering the MonitorUpdating the Monitor via TFTP Monitor: Monitor Recovery and UpdatesMonitor: Monitor Recovery and Updates 4Enter showpci at the command promptResetting Environment Variables Monitor: Monitor Recovery and UpdatesACCESSING THE CONSOLE OVER ETHERNET Monitor: Accessing the Console Over EthernetMONITOR COMMAND REFERENCE Monitor: Boot Commands Command SyntaxCommand Help BOOT COMMANDSbootelf bootmbootp bootvMonitor: Memory Commands rarpboottftpboot MEMORY COMMANDSfind Monitor: Memory CommandsMonitor: Memory Commands Monitor: Flash Commands FLASH COMMANDSerase flinfoMonitor: EEPROM/I2C Commands EEPROM/I2C COMMANDSprotect eepromicrc32 iloopiprobe DEFINITION: iprobeMonitor: Environment Parameter Commands ENVIRONMENT PARAMETER COMMANDSTEST COMMANDS printenvMonitor: Other Commands OTHER COMMANDSdiags mtestcrc32 dateecho enumpcihelp iminfoisdram loopreset DEFINITION: resetping DEFINITION: ping hostDefault Monitor: Environment Variablesscript showmacDescription: continued DefaultMonitor: Environment Variables VariableVariable:1 DefaultMonitor: Environment Variables VariableMonitor: Troubleshooting DOWNLOAD FORMATSBinary Motorola S-Recordblank page 11-26PmPPC7448 User’s Manual 10006757-02Acronyms ASCIICPLD cPSBSDRAM SO-DIMMSROM UARTIndex Index continued watchdog timer . . . . . . . . . . . . . . Index continuedterminology . . . . . . . . . . . . . . . . . . UL certifications . . . . . . . . . . . . . . .PmPPC7448 User’s Manual blank page10006757-02 Notes E M E R S O N. C O N S I D E R I T S O L V E D