Acronyms, Cpsb, GbE, PrPMC | Emerson PMPPC7448 guide

Section 12

Acronyms

ASCII

American Standard Code for Information Interchange

CPLD

Complex Programmable Logic Device

CPM

Communication Processor Module

cPSB

Compact Packet Switched Backplane

CPU

Central Processing Unit

CSA

Canadian Standards Association

DDR

Double Data Rate

DMC

Development Mezzanine Card

EC

European Community

ECC

Error-correcting Code

EIA

Electronic Industries Alliance

EMC

Electromagnetic Compatibility

EMI

Electromagnetic Interference

ESD

Electrostatic Discharge

ETSI

European Telecommunications Standards Institute

FCC

Federal Communications Commission

GbE

Gigabit Ethernet

GMII

Gigabit Media Independent Interface

GNU

GNU’s Not Unix

GPL

General Public License

I2C

Inter-integrated Circuit

IEC

International Electrotechnical Commission

JTAG

Joint Test Action Group

LED

Light-emitting Diode

MAC

Medium/media Access Control/controller

MII

Media Independent Interface

MTBF

Mean Time Between Failures

NEBS

Network Equipment-Building System

PCI

Peripheral Component Interconnect

PHY

Physical Interface

PLCC

Plastic Leaded Chip Carrier

PLD

Programmable Logic Device

PLL

Phase-locked Loop

PMC

PCI Mezzanine Card

POST

Power-on Self-test

PrPMC

Processor PCI Mezzanine Card

RISC

Reduced Instruction Set Computing

10006757-02

PmPPC7448 User’s Manual

12-1

Image 129

Emerson PMPPC7448 user manual Acronyms, Cpsb, GbE, PrPMC

Contents

PmPPC7448 PowerPC-Based Processor PMC Module Revision Level Principal Changes Date Regulatory Agency Warnings & Notices FCC Rules and Regulations PartEMC Compliance Manufacturer’s Name ProductModel Name/Number Contents Contents Acronyms Blank Figures Viii Tables Blank Registers Xii Overview Components and Features Development Mezzanine Card DMC Overview Components and Features Functional Overview Overview Functional Overview Physical Memory MAP Overview Physical Memory Map EBFF,FFFF Hex Physical Access Address Mode Description See Overview Additional Information Type SpecificationAdditional Information Product Certification EMC UL Certification Terminology and Notation RoHS ComplianceTechnical References Device / Interface Document Document Device / Interface Intel StrataFlash Embedded Memory P30 Datasheet Blank Electrostatic Discharge SetupPMPPC7448 Circuit Board Width Depth Height top side Height bottom side C325 Setup PmPPC7448 Circuit Board PLD P14 Connectors 3LED Locations, Bottom LEDs Front Panel Front Panel Switch Reset PMPPC7448 Setup Setup PmPPC7448 Setup Environmental Considerations Power RequirementsRisk of damage to the board Environment Range Relative Humidity PMC Installing the Module Setup Troubleshooting TroubleshootingBaseboard Technical Support 8Serial Number and Product ID on Bottom Side Product Repair Setup Troubleshooting Central Processing Unit Category MPC7448 Key Features Processor Reset Register Default After Initialization HexProcessor Initialization Hardware Implementation Dependent 0 Register Central Processing Unit Processor Initialization Central Processing Unit Processor Initialization Hardware Implementation Dependent 1 Register Exception Handling Central Processing Unit Exception Handling Priority Exception Post-Instruction Execution Central Processing Unit Exception Processing Exception ProcessingMachine State Register FE0 FE1 FP Exception Mode Central Processing Unit Cache Memory Cache MemoryL1 Cache L2 Cache Central Processing Unit Cache Memory Boot Memory Configuration On-Card Memory ConfigurationJumper Function Options Default Configuration User Flash On-Card Memory Configuration On-Card Sdram ON-CARD SdramNvram Allocation On-Card Memory Configuration Nvram Allocation Window SizeAddress Offset hex Name Bytes Blank XOR System Controller CPU Interface System Controller CPU InterfaceCPU Interface Registers Memory Interface System Controller Device Controller Interface Internal SramDevice Controller Interface System Controller Internal Idma Controller Timer/CounterDevice Control Registers Internal Idma Controller System Controller PCI Interface PCI Configuration SpacePCI Subsystem Device and Vendor ID Assignment PCI Read/Write Sdram Size System Controller PCI Bus Control Signals PCI BUS Control SignalsPCI Interface Registers Eready Ready PRESENT* Present PMC Connector Pinouts System Controller PMC Connector PinoutsPin P11 Signal P12 Signal P11 and P12 Pin Assignments P13 and P14 Pin Assignments Pin P13 Signal P14 Signal 6PMC Connector PMC Connector Doorbell Registers System Controller Doorbell RegistersOutbound Doorbells Inbound Doorbells Reset Watchdog TimerSystem Controller 66 MHz Bus Operation MHZ BUS Operation MV64460 Ethernet Registers Ethernet Interface Ethernet Interface Ethernet Address Ethernet AddressEthernet Connection P1 Ethernet Interface Ethernet Connection P1 Pin SignalCable may result in a disconnection Mini-B USB Pin Description RJ45 Pin Blank Reset Event Register RER Reset RegistersReset Command Register RCR Cpld SCL Cpld Reset Registers Interrupt Registers Cpld Interrupt Registers Interrupt Pending Register IPR Interrupt Enable Register IER Product ID Register PIR Cpld Product ID Register PIREready Register Erdy Revision Registers Board Configuration Registers Cpld Board Configuration RegistersHardware Version Register HVR PLD Version Register PVR Reserved Boot Blank Serial Input/Output BRGx Configuration RegisterMULTI-PROTOCOL Serial Controllers Mpsc Serial DMA Sdma Channels Serial Input/Output I2C Interface BRGx Tuning RegisterI2C Interface Connection Mini-USB Pin Description DB9 Pin Serial Input/Output I/O Connection Blank Block Diagram Real-Time ClockOperation Real-Time Clock Clock Operation Clock OperationAddress Data Function/Range Don’t care bit Blank DMC Circuit Board Development Mezzanine Card Serial Numbers Development Mezzanine Card DMC Circuit Board Development Mezzanine Card Connectors ConnectorsP1 Connector Pin Assignments OUT Dmcoe P2 EIA-232 Interface 3DMC P2 Mini-USB Connector Development Mezzanine Card PmPPC7448 to DMC Jtag PMPPC7448 to DMC JtagP3 JTAG/COP 6DMC P4 Jtag Chain Header P4 Jtag Chain Header DMC Jumpers JP1 Development Mezzanine Card DMC Jumpers JP1 Jumper Setting Register Development Mezzanine Card Debug/Status LEDsDEBUG/STATUS Leds Development Mezzanine Card DMC Setup DMC SetupInstalling the DMC Card DMC Location on PmPPC7448 Development Mezzanine Card Troubleshooting 10-14 Monitor COMMAND-LINE Features Power-up/Reset Sequence Monitor Basic OperationBasic Operation 2Power-up/Reset Sequence Flowchart Post Diagnostic Results Monitor Monitor Recovery and UpdatesMonitor Recovery and Updates Recovering the Monitor Updating the Monitor via Tftp PCI1 Restoring the PmPPC7448 Monitor Using the KatanaQP Verify that the checksum is correct Resetting Environment Variables Monitor Accessing the Console Over Ethernet Accessing the Console Over EthernetMonitor Command Reference Boot Commands Monitor Boot Commands Bootm BootelfBootp Bootv Memory Commands Monitor Memory Commands Find Definition mm .b, .w, .l address Flash Commands Monitor Flash CommandsErase Flinfo EEPROM/I2C Commands Monitor EEPROM/I2C CommandsProtect Eeprom Iloop Icrc32Imd Imm Monitor Environment Parameter Commands Environment Parameter CommandsTest Commands Other Commands Monitor Other Commands Date Crc32Echo Enumpci Iminfo HelpIsdram Loop Pci PingRun Environment Variables Monitor Environment Variables Bootfile Variable Description Download Formats Monitor TroubleshootingBinary Motorola S-Record 11-26 CPSB AcronymsGbE PrPMC RMA Index Contents, table Cpld registers -1 to 11-17 Index UL certifications Blank 10006757-02 E R S O N. C O N S I D E R I T S O L V E D