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Emerson PMPPC7448 user manual CPLD:Board Configuration Registers, Hardware Version Register HVR

Models: PMPPC7448

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CPLD:Board Configuration Registers

CPLD:Board Configuration Registers

Hardware Version Register (HVR)

Register 7-8:Hardware Version Register (HVR) at 0xf820,7000

7	6	5	4	3	2	1	0

				HVR

HVR: Hardware Version number

This is hard coded in the PLD and changes with every major PCB version. Version starts at 0016.

PLD Version Register (PVR)

Register 7-9:PLD Version Register (PVR) at 0xf820,8000

7	6	5	4	3	2	1	0

				PVR

PVR: PLD code Version number

This is hard coded in the PLD and changes with every major code change. Version starts at 0016.

BOARD CONFIGURATION REGISTERS

Three byte-wide, read-only Board Configuration registers start at location F820,900016. These registers allow the monitor software to easily determine specific hardware configu- rations, including Monarch/non-Monarch, DMC status, Boot device, and system clock speed.

Note: Board Configuration register 2 (0xf820,b000) is not available.

Register 7-10:PmPPC7448 Board Configuration 3 (BCR3) at 0xf820,c000

7

6

5

4

3

2

1

0

Reserved

Mon

DMC

R

Reserved: Reserved for future use, default is 0

Mon: Processor PMC Monarch indication 1 PPMC is Monarch

0 PPMC is non-Monarch

7-6

PmPPC7448 User’s Manual

10006757-02

Image 78

Emerson PMPPC7448 user manual CPLD:Board Configuration Registers, Hardware Version Register HVR, PLD Version Register PVR

Contents

PmPPC7448: PowerPC-BasedProcessor PMC Module User’s ManualRevision Level Principal ChangesDate Regulatory Agency Warnings & Notices FCC RULES AND REGULATIONS — PARTEMC COMPLIANCE Product Regulatory Agency Warnings & NoticescontinuedManufacturer’s Name Model Name/Number4On-CardMemory Configuration Contents2 Setup 1 Overview9 Real-TimeClock Contentscontinued8 Serial Input/Output 10Development Mezzanine Card12 Acronyms Contentscontinuedblank page PmPPC7448 User’s Manual10006757-02 Figures PmPPC7448 User’s Manual blank pageviii 10006757-02Tables blank page PmPPC7448 User’s Manual10006757-02 Registers blank page PmPPC7448 User’s Manual10006757-02 Section COMPONENTS AND FEATURESOverview System Controller/PCI BridgeOverview: Components and Features Development Mezzanine Card DMCFront Panel Overview: Functional OverviewFUNCTIONAL OVERVIEW Development Mezzanine Card DMCHex Address Overview: Physical Memory MapPHYSICAL MEMORY MAP MemoryAddress AccessHex Physical ModeADDITIONAL INFORMATION SpecificationOverview: Additional Information Product CertificationOverview: Additional Information UL CertificationSpecification TypeTechnical References RoHS ComplianceTerminology and Notation Device / InterfaceDocument: continuedOverview: Additional Information Device / InterfacePmPPC7448 User’s Manual blank page1-10 10006757-02PMPPC7448 CIRCUIT BOARD SetupELECTROSTATIC DISCHARGE WidthSetup: PmPPC7448 Circuit Board C279 Setup: PmPPC7448 Circuit BoardConnectors Setup: PmPPC7448 Circuit BoardLEDs Setup: PmPPC7448 Circuit BoardEthernet Reset SW1Front Panel SerialReset the switchSetup: PmPPC7448 Circuit Board Setup: PmPPC7448 Setup PMPPC7448 SETUPEnvironmental Considerations Power RequirementsWatt Requirements/Configuration risk of damage to the boardInstalling the Module Setup: PmPPC7448 SetupPmPPC7448PmPPC7448 BottomsideBottomside Setup: Troubleshooting TROUBLESHOOTINGbaseboard Technical Support Setup: TroubleshootingSerial Number Product RepairSetup: Troubleshooting Product ID8310 Excelsior Drive Madison, WI Emerson Network Power, Embedded ComputingTest and Repair Services Department RMA #____________Category MPC7448 Key FeaturesCentral Processing Unit SectionPROCESSOR INITIALIZATION PROCESSOR RESETDefault After Initialization Hex RegisterCentral Processing Unit:Processor Initialization Hardware Implementation Dependent 0 RegisterXAE: Extended Addressing Enabled Central Processing Unit:Processor InitializationHID1ECLK HRESETHardware Implementation Dependent 1 Register HID1BCLKHRESET Central Processing Unit:Exception HandlingEXCEPTION HANDLING HID1ECLKPriority Instruction Dispatch/ExecutionPost-InstructionExecution ExceptionMachine State Register Central Processing Unit:Exception ProcessingEXCEPTION PROCESSING Notes: continuedFP Exception Mode Central Processing Unit:Exception ProcessingCentral Processing Unit:Cache Memory CACHE MEMORY L1 CacheFP Exception Mode: continued L2 Cache Central Processing Unit:Cache MemoryL2HWF: L2 Hardware Flush 0Flush disabled Central Processing Unit:Cache MemoryDefault Configuration On-CardMemory ConfigurationBOOT MEMORY CONFIGURATION USER FLASHOn-CardMemory Configuration:On-CardSDRAM ON-CARDSDRAMNVRAM ALLOCATION Address Offset hex On-CardMemory Configuration:NVRAM AllocationWindow Size Nameblank page PmPPC7448 User’s Manual10006757-02 System Controller SectionCPU Interface Registers System Controller: CPU InterfaceCPU INTERFACE MEMORY INTERFACE DDR SDRAM ControllerSystem Controller: Device Controller Interface Internal SRAMDEVICE CONTROLLER INTERFACE Device Control Registers Timer/CounterSystem Controller: Internal IDMA Controller INTERNAL IDMA CONTROLLERPCI Subsystem Device and Vendor ID Assignment PCI Configuration SpaceSystem Controller: PCI Interface PCI Read/WriteMax SDRAM Size System Controller: PCI InterfaceSDRAM Size SDRAM SizePCI Interface Registers System Controller: PCI Bus Control SignalsPCI BUS CONTROL SIGNALS AD31:00GNT*: GRANT C/BE7:4EREADY: READY INTA*, INTB*, INTC*, INTDSERR RESET_OUT*: RESET OUTPUTPRESENT*: PRESENT STOP*: STOPP11 Signal System Controller: PMC Connector PinoutsPMC CONNECTOR PINOUTS P12 SignalP13 and P14 Pin Assignments P13 SignalP14 Signal System Controller: PMC Connector PinoutsP13 Signal PMC ConnectorSystem Controller: PMC Connector Pinouts P14 SignalOutbound Doorbells System Controller: DoorbellRegistersDOORBELL REGISTERS Inbound DoorbellsSystem Controller: 66 MHz Bus Operation WATCHDOG TIMERRESET 66 MHZ BUS OPERATIONEthernet Interface MV64460 ETHERNET REGISTERSSection ETHERNET CONNECTION P1 Ethernet Interface: Ethernet AddressETHERNET ADDRESS 00 80 F9 xx yy zzcable may result in a disconnection SignalEthernet Interface: Ethernet Connection P1 Mini-BUSB Pinblank page PmPPC7448 User’s Manual10006757-02 Reset Command Register RCR RESET REGISTERSReset Event Register RER CPLDCPLD:Reset Registers CPLD:Interrupt Registers INTERRUPT REGISTERSInterrupt Enable Register IER Interrupt Pending Register IPRCPLD:Interrupt Registers EREADY REGISTER ERDY CPLD:Product ID Register PIRPRODUCT ID REGISTER PIR REVISION REGISTERSHardware Version Register HVR CPLD:Board Configuration RegistersBOARD CONFIGURATION REGISTERS PLD Version Register PVRCPLD:Board Configuration Registers 0 DMC is not installedblank page PmPPC7448 User’s Manual10006757-02 Serial Input/Output BRGx Configuration RegisterMPSCx Main Configuration Registers MULTI-PROTOCOLSERIAL CONTROLLERS MPSCI2C INTERFACE BRGx Tuning RegisterSerial Input/Output: I2C Interface I/O CONNECTIONDescription:2 Serial Input/Output: I/O ConnectionMini-USBPin DB9 Pinblank page PmPPC7448 User’s Manual10006757-02 OPERATION BLOCK DIAGRAMReal-TimeClock SectionData Real-TimeClock: Clock OperationCLOCK OPERATION Function/RangeReal-TimeClock: Clock Operation ST: Stop bit 1=Stops the oscillatorblank page PmPPC7448 User’s Manual10006757-02 Section Development Mezzanine CardDMC CIRCUIT BOARD WidthDevelopment Mezzanine Card:DMC Circuit Board Serial NumbersP1 Connector Pin Assignments Development Mezzanine Card:ConnectorsCONNECTORS SignalSignal Development Mezzanine Card:ConnectorsSignal 3.3V: 3.3 V is the power supply to the DMC analogDMC_OE WE0 LA17:2 BADDR2:0 AD7:0 FILT_TX FILT_RX CPU_VIO MPC7448_TCK DMC_BOOT_SRC DMC_JP4:3,1MPC7448_TMS DEBUG_SRESET DEBUG_HRESET LED4:1 MPC7448_TDO MPC7448_TDI DEBUG_TRSTSignal P2 EIA-232InterfaceDevelopment Mezzanine Card:Connectors SignalP3 JTAG/COP Development Mezzanine Card:PmPPC7448 to DMC JTAGPMPPC7448 TO DMC JTAG MPC7448HRESETSignal P4 JTAG Chain HeaderSignal Development Mezzanine Card:PmPPC7448 to DMC JTAGSignal Development Mezzanine Card:DMC Jumpers JP1DMC JUMPERS JP1 SignalJumper Setting Register Development Mezzanine Card:Debug/Status LEDsDEBUG/STATUS LEDS Development Mezzanine Card:DMC Setup DMC SETUPInstalling the DMC Card DMC Location on PmPPC7448 Development Mezzanine Card:DMC SetupFigure RJ45Technical Support Development Mezzanine Card:TroubleshootingTROUBLESHOOTING Product RepairTest and Repair Services Department Emerson Network PowerDevelopment Mezzanine Card:Troubleshooting 8310 Excelsior Drive Madison, WICOMMAND-LINEFEATURES MonitorSection Power-up/ResetSequence Monitor: Basic OperationBASIC OPERATION 11-3 Monitor: Basic Operation10006757-02 baudrateMONITOR RECOVERY AND UPDATES Monitor: Monitor Recovery and UpdatesPOST Diagnostic Results Recovering the MonitorUpdating the Monitor via TFTP Monitor: Monitor Recovery and UpdatesMonitor: Monitor Recovery and Updates 4Enter showpci at the command promptResetting Environment Variables Monitor: Monitor Recovery and UpdatesMonitor: Accessing the Console Over Ethernet ACCESSING THE CONSOLE OVER ETHERNETMONITOR COMMAND REFERENCE Command Help Monitor: Boot CommandsCommand Syntax BOOT COMMANDSbootp bootelfbootm bootvtftpboot Monitor: Memory Commandsrarpboot MEMORY COMMANDSfind Monitor: Memory CommandsMonitor: Memory Commands erase Monitor: Flash CommandsFLASH COMMANDS flinfoprotect Monitor: EEPROM/I2C CommandsEEPROM/I2C COMMANDS eepromiprobe icrc32iloop DEFINITION: iprobeTEST COMMANDS Monitor: Environment Parameter CommandsENVIRONMENT PARAMETER COMMANDS printenvdiags Monitor: Other CommandsOTHER COMMANDS mtestecho crc32date enumpciisdram helpiminfo loopping resetDEFINITION: reset DEFINITION: ping hostscript DefaultMonitor: Environment Variables showmacMonitor: Environment Variables Description: continuedDefault VariableMonitor: Environment Variables Variable:1Default VariableBinary Monitor: TroubleshootingDOWNLOAD FORMATS Motorola S-RecordPmPPC7448 User’s Manual blank page11-26 10006757-02CPLD AcronymsASCII cPSBSROM SDRAMSO-DIMM UARTIndex Index continued terminology . . . . . . . . . . . . . . . . . . watchdog timer . . . . . . . . . . . . . .Index continued UL certifications . . . . . . . . . . . . . . .blank page PmPPC7448 User’s Manual10006757-02 Notes E M E R S O N. C O N S I D E R I T S O L V E D