Emerson PMPPC7448 Central Processing Unit:Cache Memory, L2HWF: L2 Hardware Flush 0Flush disabled

Central Processing Unit:Cache Memory

L2HWF: L2 Hardware Flush

0Flush disabled

1Flush enabled

LVRAME: LVRAM enable

0LVRAM mode disabled

1LVRAM mode enabled

LVRAMM: LVRAM mode (read-only)

000Reserved if LVRAM mode is enabled

001Mode 1

010Mode 2

011Mode 3

100Mode 4

101Mode 5

110Mode 6

111Mode 7

The L2 cache is cleared following a power-on or hard reset. Before enabling the L2 cache, configuration parameters must be set in the L2CR and the L2 tags must be globally invali- dated. Initialize the L2 cache during system start-up per the following sequence:

1Power-on reset (automatically performed by the assertion of HRESET* signal).

2Disable interrupts and dynamic power management (DPM).

3Disable L2 cache by clearing L2CR[L2E].

4Perform an L2 global invalidate.

5Enable the L2 cache for normal operation by setting the L2CR[L2E] bit to 1.

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PmPPC7448 User’s Manual 10006757-02