Bootelf, Bootm, Bootp, Bootvx | Emerson PMPPC7448 specification

Monitor: Boot Commands

bootelf

The bootelf command boots from an ELF image in memory, where address is the load address of the ELF image.

DEFINITION: bootelf [address]

bootm

The bootm command boots an application image stored in memory, passing any entered arguments to the called application. When booting a Linux kernel, arg can be the address of an initrd image. If addr is not specified, the environment variable loadaddr is used as the default.

DEFINITION: bootm [addr [arg …]]

bootp

The bootp command boots an image via a network connection using the BootP/TFTP pro- tocol. If loadaddress or bootfilename is not specified, the environment variables loadaddr and bootfile are used as the default.

DEFINITION: bootp [loadAddress] [bootfilename]

bootv

The bootv command checks the checksum on the primary image (in Flash) and boots it, if valid. If it is not valid, it checks the checksum on the secondary image (in Flash) and boots it, if valid. If neither checksum is valid, the command returns back to the monitor prompt.

DEFINITION: Verify bootup.

bootv

Write image to Flash and update NVRAM.

bootv <primarysecondary> write <source> <dest> <size>

Update NVRAM based on image already in Flash.

bootv <primarysecondary> update <source> <size>

Check validity of images in Flash.

bootv <primarysecondary> check

bootvx

The bootvx command boots VxWorks from an ELF image, where address is the load address of the VxWorks ELF image.

DEFINITION: bootvx [address]

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PmPPC7448 User’s Manual

10006757-02

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Emerson PMPPC7448 user manual Bootelf, Bootm, Bootp, Bootvx

Contents

PmPPC7448 PowerPC-Based Processor PMC Module Revision Level Principal Changes Date FCC Rules and Regulations Part Regulatory Agency Warnings & NoticesEMC Compliance Product Manufacturer’s NameModel Name/Number Contents Contents Acronyms Blank Figures Viii Tables Blank Registers Xii Components and Features Overview Overview Components and Features Development Mezzanine Card DMC Overview Functional Overview Functional Overview Overview Physical Memory Map Physical Memory MAP Hex Physical Access Address Mode Description See EBFF,FFFF Type Specification Overview Additional InformationAdditional Information Product Certification UL Certification EMC RoHS Compliance Terminology and NotationTechnical References Device / Interface Document Intel StrataFlash Embedded Memory P30 Datasheet Document Device / Interface Blank Setup Electrostatic DischargePMPPC7448 Circuit Board Width Depth Height top side Height bottom side Setup PmPPC7448 Circuit Board C325 PLD Connectors P14 LEDs 3LED Locations, Bottom Front Panel Front Panel Reset Switch Setup PmPPC7448 Setup PMPPC7448 Setup Power Requirements Environmental ConsiderationsRisk of damage to the board Environment Range Relative Humidity Installing the Module PMC Troubleshooting Setup TroubleshootingBaseboard Technical Support Product Repair 8Serial Number and Product ID on Bottom Side Setup Troubleshooting Category MPC7448 Key Features Central Processing Unit Register Default After Initialization Hex Processor ResetProcessor Initialization Central Processing Unit Processor Initialization Hardware Implementation Dependent 0 Register Central Processing Unit Processor Initialization Hardware Implementation Dependent 1 Register Central Processing Unit Exception Handling Exception Handling Post-Instruction Execution Priority Exception Exception Processing Central Processing Unit Exception ProcessingMachine State Register FE0 FE1 FP Exception Mode Cache Memory Central Processing Unit Cache MemoryL1 Cache L2 Cache Central Processing Unit Cache Memory On-Card Memory Configuration Boot Memory ConfigurationJumper Function Options Default Configuration User Flash ON-CARD Sdram On-Card Memory Configuration On-Card SdramNvram Allocation Window Size On-Card Memory Configuration Nvram AllocationAddress Offset hex Name Bytes Blank System Controller XOR System Controller CPU Interface CPU InterfaceCPU Interface Registers Memory Interface Internal Sram System Controller Device Controller InterfaceDevice Controller Interface Timer/Counter System Controller Internal Idma ControllerDevice Control Registers Internal Idma Controller PCI Configuration Space System Controller PCI InterfacePCI Subsystem Device and Vendor ID Assignment PCI Read/Write Sdram Size PCI BUS Control Signals System Controller PCI Bus Control SignalsPCI Interface Registers Eready Ready PRESENT* Present System Controller PMC Connector Pinouts PMC Connector PinoutsPin P11 Signal P12 Signal P11 and P12 Pin Assignments Pin P13 Signal P14 Signal P13 and P14 Pin Assignments PMC Connector 6PMC Connector System Controller Doorbell Registers Doorbell RegistersOutbound Doorbells Inbound Doorbells Watchdog Timer ResetSystem Controller 66 MHz Bus Operation MHZ BUS Operation Ethernet Interface MV64460 Ethernet Registers Ethernet Address Ethernet Interface Ethernet AddressEthernet Connection P1 Pin Signal Ethernet Interface Ethernet Connection P1Cable may result in a disconnection Mini-B USB Pin Description RJ45 Pin Blank Reset Registers Reset Event Register RERReset Command Register RCR Cpld Cpld Reset Registers SCL Cpld Interrupt Registers Interrupt Registers Interrupt Enable Register IER Interrupt Pending Register IPR Cpld Product ID Register PIR Product ID Register PIREready Register Erdy Revision Registers Cpld Board Configuration Registers Board Configuration RegistersHardware Version Register HVR PLD Version Register PVR Reserved Boot Blank BRGx Configuration Register Serial Input/OutputMULTI-PROTOCOL Serial Controllers Mpsc Serial DMA Sdma Channels BRGx Tuning Register Serial Input/Output I2C InterfaceI2C Interface Connection Serial Input/Output I/O Connection Mini-USB Pin Description DB9 Pin Blank Real-Time Clock Block DiagramOperation Clock Operation Real-Time Clock Clock OperationAddress Data Function/Range Don’t care bit Blank Development Mezzanine Card DMC Circuit Board Development Mezzanine Card DMC Circuit Board Serial Numbers Connectors Development Mezzanine Card ConnectorsP1 Connector Pin Assignments OUT Dmcoe 3DMC P2 Mini-USB Connector P2 EIA-232 Interface PMPPC7448 to DMC Jtag Development Mezzanine Card PmPPC7448 to DMC JtagP3 JTAG/COP P4 Jtag Chain Header 6DMC P4 Jtag Chain Header Development Mezzanine Card DMC Jumpers JP1 DMC Jumpers JP1 Development Mezzanine Card Debug/Status LEDs Jumper Setting RegisterDEBUG/STATUS Leds DMC Setup Development Mezzanine Card DMC SetupInstalling the DMC Card DMC Location on PmPPC7448 Development Mezzanine Card Troubleshooting 10-14 COMMAND-LINE Features Monitor Monitor Basic Operation Power-up/Reset SequenceBasic Operation 2Power-up/Reset Sequence Flowchart Monitor Monitor Recovery and Updates Post Diagnostic ResultsMonitor Recovery and Updates Recovering the Monitor Updating the Monitor via Tftp Restoring the PmPPC7448 Monitor Using the KatanaQP PCI1 Resetting Environment Variables Verify that the checksum is correct Accessing the Console Over Ethernet Monitor Accessing the Console Over EthernetMonitor Command Reference Monitor Boot Commands Boot Commands Bootelf BootmBootp Bootv Monitor Memory Commands Memory Commands Find Definition mm .b, .w, .l address Monitor Flash Commands Flash CommandsErase Flinfo Monitor EEPROM/I2C Commands EEPROM/I2C CommandsProtect Eeprom Icrc32 IloopImd Imm Environment Parameter Commands Monitor Environment Parameter CommandsTest Commands Monitor Other Commands Other Commands Crc32 DateEcho Enumpci Help IminfoIsdram Loop Ping PciRun Monitor Environment Variables Environment Variables Bootfile Variable Description Monitor Troubleshooting Download FormatsBinary Motorola S-Record 11-26 Acronyms CPSBGbE PrPMC RMA Contents, table Cpld registers -1 to Index Index 11-17 UL certifications Blank 10006757-02 E R S O N. C O N S I D E R I T S O L V E D