A.3.1 Intel® XScale™ Microarchitecture
The PXA250 applications processor is a system on a chip that includes Intel’s new microprocessor megacell. This includes Intel® Superpipelined Technology and a new optimized cache architecture that allows program execution to continue despite data cache misses.
The PXA250 applications processor supports:
•ARM* Architecture v5 instructions, including ARM’s Thumb extensions
•DSP Extensions but not ARM’s optional Vector Floating Point instructions
Appendix A in the Intel 80200 Developers’ manual, Order#
Using a software development toolset that takes specific advantage of Intel® XScale™ microarchitecture, and Intel® Media Processing Technology could give you substantial performance benefits.
The PXA250 applications processor offers increased performance at similar clock rates, and also a wider range of operating clock rates at lower voltages. The overall benefit is more work done for less battery power.
A.3.2 Debugging
New PXA250 hardware creates new debugging possibilities. You can use the JTAG test port to download programs into a dedicated memory area to act as a debug monitor. Applications can be inspected and performance data, such as cache hit rates, can be measured via a dialog over JTAG. These features offer developers far more visibility inside a PXA250 system improving time to market.
A.3.3 Cache Attributes
The PXA250 applications processor has twice the instruction cache and four times the data cache of the
To take advantage of cache locking software, data must be selected and specifically loaded and locked into cache.
To take advantage of new features such as
A.3.4 Other features
As mentioned before, the PXA250 DMA controller is highly versatile. With 16 channels it can be utilized as:
•Several serial ports in parallel
•A
•A fast interface for external companion devices
PXA250 and PXA210 Applications Processors Design Guide |
