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Power and Clocking
8.2Electrical Specifications
Table
Table 8-2. Absolute Maximum Ratings
Symbol | Description | Min | Max | |
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TS | Storage Temperature | 125° C | ||
VSS_O | Offset Voltage between any two VSS pins | 0.3 V | ||
(VSS, VSSQ, VSSN) | ||||
VCC_O | Offset Voltage between any of the following pins: | 0.3 V | ||
VCCQ, VCCN | ||||
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VCC_HV | Voltage Applied to High Voltage Supplies | VSS+4.0 V | ||
(VCCQ, VCCN) | ||||
VCC_LV | Voltage Applied to Low Voltage Supplies | VSS+1.45 V | ||
(VCC, PLL_VCC) | ||||
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| max of | |
VIP | Voltage Applied to | VCCQ+0.3 V, | ||
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| VSS+4.0 V | |
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| Voltage Applied to XTAL pins |
| max of | |
VIP_X | VCC+0.3 V, | |||
(PXTAL, PEXTAL, TXTAL, TEXTAL) | ||||
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| VSS+1.45 V | |
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| Maximum ESD stress voltage, Human Body Model; |
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VESD | Any pin to any supply pin, either polarity, or |
| 2000 V | |
Any pin to all |
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| Three stresses maximum. |
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IEOS | Maximum DC Input Current (Electrical Overstress) for any |
| 5 mA |
8.3Power Consumption Specifications
Power consumption on any highly integrated device is extremely dependent on the operating voltage, external switching activity, and external loading (shown in Table
The maximum power consumption specification is determined by all units running at their maximum: processor speed, voltage, and loading conditions. This method generates a conservative power consumption value; however, power supply and thermal management design requires the highest possible power consumption for robust design.The applications processor’s maximum power consumption is calculated using the following conditions:
•All peripheral units operating at maximum frequency and size configuration
•All I/O loads maximum (50pF for Memory interface, 100pF for peripherals)
•Core operating at worst case power scenario (hit rates adjusted for worst power)
•All voltages at maximum of range
PXA250 and PXA210 Applications Processors Design Guide |