LCD Display Controller

Table 3-4. PXA250 LCD Controller Ball Positions (Sheet 2 of 2)

Pin Name

Ball Position

 

 

L_DD12

A3

 

 

L_DD13

A2

 

 

L_DD14

C3

 

 

L_DD15

B3

 

 

L_FCLK

E8

 

 

L_LCLK

D8

 

 

L_PCLK

B8

 

 

Bias

A8

 

 

3.5Additional Design Considerations

3.5.1Contrast Voltage

Many displays, both active and passive, include a pin for adjusting the display contrast voltage. This is a variable analog voltage that is supplied to the panel via an voltage source on the system board. The contrast voltage is adjusted via a variable resistor on the circuit board.

The required voltage range and current capabilities vary between panel manufacturers. Consult the datasheet for your panel to determine the variable voltage circuit design. Ensure that the contrast voltage is stable, otherwise visual artifacts might result. Possible contrast-voltage circuits are often suggested by the panel manufacturers.

3.5.2Backlight Inverter

One potential source of noise for the LCD panel can be the backlight inverter. Since this is a high voltage device with frequent voltage inversions, it has the potential to inject spurious noise onto the LCD panel lines. To minimize noise:

Use a shielded backlight inverter

Physically locate the inverter as far away from the LCD data lines and system board as possible, usually located with the LCD panel

If power consumption is an issue, chose a backlight inverter that can be disabled through software. This lets you save power by automatically disabling the backlight if no activity occurs within a preset period of time

3.5.3Signal Routing and Buffering

Signal transmission rates between the LCD controller and the LCD panel are moderate, which helps to simplify the design of the LCD system. The minimum Pixel Clock Divider (PCD) value results in a pixel clock rate of one half of the LCLK (this is not the L_LCLK of the LCD controller.) The maximum LCLK for the PXA250 applications processor is 166 MHz, resulting in a maximum pixel clock rate of 83 MHz. Thus, use of 100 MHz design considerations are sufficient to ensure LCD panel signal integrity.

3-8

PXA250 and PXA210 Applications Processor Design Guide

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Intel PXA250 and PXA210 manual Additional Design Considerations, Contrast Voltage, Backlight Inverter

PXA250 and PXA210 specifications

The Intel PXA250 and PXA210 processors, part of the Intel XScale architecture, were introduced in the early 2000s, targeting mobile and embedded applications. They are known for their low power consumption, high performance, and advanced multimedia capabilities, making them suitable for a wide range of devices, including PDAs, smartphones, and other portable computing devices.

The PXA250, which operates at clock speeds ranging from 400 MHz to 624 MHz, features a superscalar architecture that allows it to issue multiple instructions per clock cycle. This enhances the overall performance for demanding applications while maintaining low power usage. It supports a variety of peripheral interfaces, including USB, Ethernet, and various memory types, which contributes to its versatility in different product designs.

One of the key technologies in the PXA250 is the integrated Intel Smart Repeat Technology, which optimizes data processing, thereby reducing the amount of power consumed during operation. This feature is particularly important for battery-powered devices, as it extends the overall battery life, allowing for longer usage times in mobile environments. Additionally, the PXA250 includes a dedicated graphics acceleration unit, which enables enhanced graphics and multimedia performance suited to modern applications at the time.

In contrast, the PXA210 is a more entry-level processor, aimed at cost-sensitive applications. Operating at lower clock speeds, typically around 200 MHz to 400 MHz, it forgoes some of the advanced performance features of the PXA250 while still offering a good balance of performance and power efficiency. The PXA210 is less complex, making it suitable for simpler devices that do not require the extensive capabilities of the PXA250.

Both processors utilize the Intel XScale architecture, which is based on the ARM instruction set. They are built on a 0.13-micron process technology, enabling higher density and lower power consumption compared to their predecessors. With integrated memory controllers and bus interfaces, they facilitate efficient data handling and connectivity options.

In summary, both the Intel PXA250 and PXA210 processors played a crucial role in the evolution of mobile computing by providing powerful processing capabilities with energy efficiency. Their features and technologies enabled device manufacturers to create innovative products that catered to the growing demand for portable devices during that era.