Intel manual Introduction, PXA250 and PXA210 Applications Processors Design Guide

Introduction

Table 1-4. PXA250 Applications Processor Pinout — Ballpad Number Order (Sheet 1 of 3)

Ball #	Signal	Ball #	Signal	Ball #	Signal
A1	VCCN	F7	GPIO[10]	L13	GPIO[2]
A2	L_DD[13]/GPIO[71]	F8	FFRTS/GPIO[41]	L14	VSSQ
A3	L_DD[12]/GPIO[70]	F9	SSPSCLK/GPIO[23]	L15	TEXTAL
A4	L_DD[11]/GPIO[69]	F10	FFDTR/GPIO[40]	L16	TXTAL
A5	L_DD[9]/GPIO[67]	F11	VCC	M1	MA[14]
A6	L_DD[7]/GPIO[65]	F12	GPIO[9]	M2	MD[21]
A7	GPIO[11]	F13	BOOT_SEL[2]	M3	MA[15]
A8	L_BIAS/GPIO[77]	F14	GPIO[8]	M4	VCCN
A9	SSPRXD/GPIO[26]	F15	VSSQ	M5	MD[1]
A10	SDATA_OUT/GPIO[30]	F16	VSSQ	M6	MD[6]
A11	SDA	G1	MA[0]	M7	MD[7]
A12	FFDCD/GPIO[36]	G2	VSSN	M8	DQM[0]
A13	FFRXD/GPIO[34]	G3	nSDCS[2]	M9	MD[8]
A14	FFCTS/GPIO[35]	G4	nWE	M10	MD[15]
A15	BTCTS/GPIO[44]	G5	nOE	M11	BATT_VCC
A16	SDATA_IN1/GPIO[32]	G6	nSDCS[1]	M12	GPIO[22]
B1	DQM[1]	G7	VCC	M13	nPREG/GPIO[55]
B2	DQM[2]	G8	VSSQ	M14	VCCN
B3	L_DD[15]/GPIO[73]	G9	VCC	M15	VSSN
B4	GPIO[14]	G10	VSSQ	M16	nIOIS16/GPIO[57]
B5	GPIO[13]	G11	TESTCLK	N1	MD[22]
B6	GPIO[12]	G12	TEST	N2	VSSN
B7	L_DD[3]/GPIO[61]	G13	BOOT_SEL[1]	N3	MA[16]
B8	L_PCLK/GPIO[76]	G14	VCCQ	N4	MD[0]
B9	SSPEXTCLK/GPIO[27]	G15	GPIO[7]	N5	VCCN
B10	FFRI/GPIO[38]	G16	BOOT_SEL[0]	N6	MD[4]
B11	FFDSR/GPIO[37]	H1	MA[2]	N7	VCCN
B12	USB_N	H2	MA[1]	N8	nCS[0]
B13	BTRXD/GPIO[42]	H3	MD[16]	N9	VCCN
B14	BTRTS/GPIO[45]	H4	VCCN	N10	MD[13]
B15	IRRXD/GPIO[46]	H5	MD[17]	N11	VCCN
B16	MMDAT	H6	MA[3]	N12	DREQ[0]/GPIO[20]
C1	RDY/GPIO[18]	H7	VSSQ	N13	VCCN
C2	VSSN	H8	VSS	N14	DREQ[1]/GPIO[19]
C3	L_DD[14]/GPIO[72]	H9	VSS	N15	GPIO[21]
C4	VSSQ	H10	VCC	N16	nPWAIT/GPIO[56]
C5	L_DD[8]/GPIO[66]	H11	nTRST	P1	MA[17]

1-12 PXA250 and PXA210 Applications Processors Design Guide