Intel PXA250 and PXA210 Power and Clocking, 12. Variable Latency I/O Interface AC Specifications

Power and Clocking

Table 8-12. Variable Latency I/O Interface AC Specifications (3.3 V)

			MEMCLK Frequency (MHz)
Symbol	Description						Notes
		99.5	118.0	132.7	147.5	165.9
	Variable Latency IO Interface (VLIO) (Asynchronous)
tvlioAS	MA(25:0) setup to nCS asserted	10 ns	8.5 ns	7.5 ns	6.8 ns	6 ns	1
tvlioASRW	MA(25:0) setup to nOE or nPWE asserted	10 ns	8.5 ns	7.5 ns	6.8 ns	6 ns	1
tvlioAH	MA(25:0) hold after nOE or nPWE deasserted	10 ns	8.5 ns	7.5 ns	6.8 ns	6 ns	1
tvlioCES	nCS setup to nOE or nPWE asserted	20 ns	17 ns	15 ns	13.6 ns	12 ns	2
tvlioCEH	nCS hold after nOE or nPWE deasserted	10 ns	8.5 ns	7.5 ns	6.8 ns	6 ns	1
tvlioDSW	MD(31:0), DQM(3:0) write data setup to nPWE asserted	10 ns	8.5 ns	7.5 ns	6.8 ns	6 ns	1
tvlioDSWH	MD(31:0), DQM(3:0) write data setup to nPWE	20 ns	17 ns	15 ns	13.6 ns	12 ns	2
	deasserted
tvlioDHW	MD(31:0), DQM(3:0) hold after nPWE deasserted	10 ns	8.5 ns	7.5 ns	6.8 ns	6 ns	1
tvlioDHR	MD(31:0) read data hold after nOE deasserted	0 ns	0 ns	0 ns	0 ns	0 ns	—
tvlioRDYH	RDY hold after nOE, nPWE deasserted	0 ns	0 ns	0 ns	0 ns	0 ns	—
tvlioNPWE	nPWE, nOE high time between beats of write or read	20 ns	17 ns	15 ns	13.6 ns	12 ns	2
	data

NOTES:

1.This number represents 1 MEMCLK period

2.This number represents 2 MEMCLK periods

Table 8-13. Card Interface (PCMCIA or Compact Flash) AC Specifications (3.3 V)

			MEMCLK Frequency (MHz)
Symbol	Description						Notes
		99.5	118.0	132.7	147.5	165.9
	Card Interface (PCMCIA or Compact Flash) (Asynchronous)
tcardAS	MA(25:0), nPREG, PSKTSEL, nPCE setup to nPWE,	20 ns	17 ns	15 ns	13.6 ns	12 ns	1
	nPOE, nPIOW, or nPIOR asserted
tcardAH	MA(25:0), nPREG, PSKTSEL, nPCE hold after nPWE,	10 ns	8.5 ns	7.5 ns	6.8 ns	6 ns	1
	nPOE, nPIOW, or nPIOR deasserted
tcardDS	MD(31:0) setup to nPWE, nPOE, nPIOW, or nPIOR	10 ns	8.5 ns	7.5 ns	6.8 ns	6 ns	1
	asserted
tcardDH	MD(31:0) hold after nPWE, nPOE, nPIOW, or nPIOR	10 ns	8.5 ns	7.5 ns	6.8 ns	6 ns	1
	deasserted
tcardCMD	nPWE, nPOE, nPIOW, or nPIOR command assertion	30 ns	25.5 ns	22.5 ns	20.4 ns	18 ns	1
NOTE:

1. These numbers are minimums. They can be much longer based on the programmable Card Interface timing registers.

8-16 PXA250 and PXA210 Applications Processors Design Guide