Introduction

s

Figure 1-1. Applications Processor Block Diagram

RTC

OS Timer

PWM(2)

Int.

Controller

PurposeI/O

Clocks &

PeripheralBus

ControllerDMA

Bridgeand

AC97

 

Power Man.

 

 

 

 

I2S

 

 

 

 

I2C

 

 

 

General

UART1

 

 

 

 

 

 

 

 

UART2

 

 

 

 

Slow IrDA

 

 

 

 

Fast IrDA

 

 

 

SSP

USB

Client

MMC

Color or

Grayscale

LCD

Controller

System Bus

Megacell

Core

3.6864 32.768

MHz KHz

Osc Osc

Memory

Controller

Variable

 

Latency I/O

ASIC

Control

 

PCMCIA

XCVR

Socket 0

& CF

Socket 1

Control

 

 

Dynamic

 

 

 

SDRAM/

 

SMROM

Memory

 

 

 

 

 

 

 

4 banks

Control

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Static

 

 

 

ROM/

 

Flash/

Memory

 

 

 

 

 

 

SRAM

Control

 

 

 

 

4 banks

 

 

 

 

 

 

 

 

 

A8651-01

The PXA250 applications processor package is: 256 pin, 17x17 mBGA – 32-bit functionality. The

PXA210 applications processor package is: 225 pin, 13x13 MMAP – 16-bit functionality, a subset of the PXA250 applications processor feature set.

Section 1.2.1, “Package Introduction” contains a breakdown of the features supported by the two different packages.

1.2Package Information

This section describes the package types, pinouts, and signal descriptions.

1.2.1Package Introduction

Package features of the PXA250 applications processor are:

Core frequencies supported - 100 MHz - 400 MHz

1-2

PXA250 and PXA210 Applications Processors Design Guide

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Intel PXA250 and PXA210 manual Package Information, Package Introduction

PXA250 and PXA210 specifications

The Intel PXA250 and PXA210 processors, part of the Intel XScale architecture, were introduced in the early 2000s, targeting mobile and embedded applications. They are known for their low power consumption, high performance, and advanced multimedia capabilities, making them suitable for a wide range of devices, including PDAs, smartphones, and other portable computing devices.

The PXA250, which operates at clock speeds ranging from 400 MHz to 624 MHz, features a superscalar architecture that allows it to issue multiple instructions per clock cycle. This enhances the overall performance for demanding applications while maintaining low power usage. It supports a variety of peripheral interfaces, including USB, Ethernet, and various memory types, which contributes to its versatility in different product designs.

One of the key technologies in the PXA250 is the integrated Intel Smart Repeat Technology, which optimizes data processing, thereby reducing the amount of power consumed during operation. This feature is particularly important for battery-powered devices, as it extends the overall battery life, allowing for longer usage times in mobile environments. Additionally, the PXA250 includes a dedicated graphics acceleration unit, which enables enhanced graphics and multimedia performance suited to modern applications at the time.

In contrast, the PXA210 is a more entry-level processor, aimed at cost-sensitive applications. Operating at lower clock speeds, typically around 200 MHz to 400 MHz, it forgoes some of the advanced performance features of the PXA250 while still offering a good balance of performance and power efficiency. The PXA210 is less complex, making it suitable for simpler devices that do not require the extensive capabilities of the PXA250.

Both processors utilize the Intel XScale architecture, which is based on the ARM instruction set. They are built on a 0.13-micron process technology, enabling higher density and lower power consumption compared to their predecessors. With integrated memory controllers and bus interfaces, they facilitate efficient data handling and connectivity options.

In summary, both the Intel PXA250 and PXA210 processors played a crucial role in the evolution of mobile computing by providing powerful processing capabilities with energy efficiency. Their features and technologies enabled device manufacturers to create innovative products that catered to the growing demand for portable devices during that era.