8

 

 

7

 

 

6

5

4

 

 

3

 

 

2

 

 

1

Copyright 2002 Intel Corporation

{14} LCD_G4

 

 

LCD CPLD

 

U33

 

 

XCR3128XL-10VQ100C

2

 

Xilinx CPLD

A0

E0_CLK1

1

40

41

R216

100K

 

 

 

 

Pg. 13

 

 

 

D5

 

 

 

 

2

DCNEG14V {14}

U40

 

 

1

 

 

 

 

 

 

3

 

MAX633ACSA

C121

22UF

 

D6

Adj Step-up

2

3

D

C

B

{14} LCD_G5 {14} LCD_SPS {14} LCD_CLS

{14} LCD_LP

{14} LCD_SPL

{14} LCD_G0

{14} LCD_G1

{14} LCD_G2

{14} LCD_G3

 

{14}

LCD_SPR

REV

{4}

LCD_TYPE

 

 

{14} LCD_R2

{14} LCD_R3

{14} LCD_R4

{14} LCD_R5 {14} LCD_LBR

{14} LCD_PS {6} CPLD1_TDO

{6} MMC_PWR_ON {2,11} nMMC_DETECT {11} MMC_ON

{14} SHARP_LCD_PWR_ON

{14} LCD_R0

{14} LCD_R1

{14} LCD_B1

{14} LCD_B0

{14} LCD_CLK {3,6,10,11,14} JTAG_TMS

R213

100K{3} nVDD_FAULT {15} VDD_FAULT

 

{14}

LCD_ENAB

R214

{14}

LCD_NCLK

 

{14}

LCD_B5

100K

{14}

LCD_B2

 

{14}

LCD_B3

 

{14}

LCD_B4

R171

{3}

L_PCLK

 

 

100K

{10}

CF_nCD2

 

 

DC3P3V

 

 

100

A2

E2

A4

E4

99

A5

E5

98

A7

E7

97

A8

E8

96

A10

E10

94

A12

E12

93

A13

E13

92

A15_CLK3

E15

 

14

B0

F0

13

B2

F2

12

B4

F4

10

B5

F5

9

B7

F7

8

B8

F8

7

B10

F10

6

B12

F12

5

B13

F13

4

B15_TDI

F15_TCK

 

25

C0

G0

24

C2

G2

23

C4

G4

22

C5

G5

21

C7

G7

20

C8

G8

19

C10

G10

17

C12

G12

16

C13

G13

15

C15_TMS

G15_TDO

 

37

D0_CLK2

H0

36

D2

H2

35

D4

H4

33

D5

H5

32

D7

H7

31

D8

H8

30

D10

H10

29

D12

H12

28

D13

H13

27

D15

H15

 

87

IN0_CLK0

 

89

 

IN1

 

88

 

IN2

 

90

 

IN3

 

 

 

3

VDD_1

VSS_1

18

VDD_2

VSS_2

34

VDD_3

VSS_3

42

44

45

46

47

48

49

50

52

53

54

55

56

57

58

60

61

62

63

64

65

67

68

69

70

71

72

73

75

76

77

78

79

80

81

83

84

85

11

26

38

CF_nCD1 {10} nNEP_PRESENT {4,15} CF_PWR_ON {6}

CF_PWR {10}

GPIO_11 {3}

SYSCLK {8,15} nXCV_ADD_OE {6,7}

MBREQ_CF_DETECT {3,15}

nGFX_PRESENT {4,15}

L_DD_0 {3}

L_DD_1 {3}

L_DD_2 {3}

L_DD_3 {3}

L_DD_4 {3}

L_DD_5 {3}

L_DD_6 {3}

L_DD_7 {3}

JTAG_TCK {3,6,10,11,14}

L_DD_8 {3,4}

L_DD_9 {3,4}

L_DD_10 {3,4}

L_DD_11 {3,4}

L_DD_12 {3,4}

L_DD_13 {3,4}

L_DD_14 {3,4}

L_DD_15 {3,4}

L_LCLK {3}

CPLD2_TDO {3}

L_FCLK {3}

L_BIAS {3}

LCD_PWR_ON {6,14} SA_PWR_EN {3,12} nRESET_OUT {3,6,11,15} FLASH_nRP {5} LCD_MODE {14}

LCD_UBL {14}

LCD_DC5V

L3

INDUCTOR

470UH

 

 

Sw Reg

+

 

 

ZENER_3P3V

D

1

LBI

COMP

8

 

 

 

1

 

 

DC_15V

{14,15}

 

DCNEG11P7V {14}

2

 

 

 

 

LBO

VFB

7

 

 

 

 

3

GND

CP

6

 

 

 

 

 

 

 

 

 

 

45

LXVOUT

 

22UF

C120

C122

0.1UF

C126

22UF

C127

0.1UF

R202

9.76K

C128

0.1UF

2

 

 

1

C129

MAX633ACSA

 

+

 

 

 

 

 

 

 

 

 

 

+

 

 

 

 

 

+

 

 

 

 

 

 

4.7UF

C

 

 

LCD_DC5V

U44

 

 

 

 

 

 

 

 

Note: On

 

 

A1

VCC

 

 

 

 

HBL-0204

H CN2-1

board Back

 

 

 

 

 

{3,8,10,11,12,14} VBATT

A2

VIN

 

Light Inverter

A3

 

 

R207

A4

ON_OFF

L CN2-2

for Toshiba

{2} SA_PWM_0

 

GND

 

0

DNI

 

PIEZOELECTRIC INVERTER

Display

 

 

 

R208

0

 

 

 

 

B

C105

0.1UF

C106

0.1UF

C107

0.1UF

C108

0.1UF

39

VDD_4

VSS_4

51

VDD_5

VSS_5

66

VDD_6

VSS_6

82

VDD_7

VSS_7

91

VDD_8

VSS_8

 

XCR3128XL-10VQ100C

43

59

74

86

95

DNI

R151

{2} SA_PWM_0 4.99K

Back Light Header for Off Board Sharp Back Light Inverter

LCD_DC5V

R172

{14}

VCOM

LCD_DC5V

 

 

U34

 

 

 

 

 

R173

 

SN74HCT04D

 

 

 

{14} PVEE

 

10

 

 

 

 

 

 

 

 

Hex Inv

 

 

 

 

 

1

 

14

 

 

 

 

 

1A

VDD

LCD_DC4V

{14}

 

 

2

 

 

 

1Y

 

13

REV

 

 

 

 

 

6A

 

 

 

 

 

 

 

 

R176

27.4K

4

2Y

12

 

 

 

3

2A

6Y

AB_SW

{14}

 

 

A

 

5A

11

 

 

 

 

 

 

 

10

 

 

 

 

 

5

 

5Y

 

 

 

 

 

3A

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

9

 

 

 

 

 

3Y

4A

 

 

 

R177

 

7

8

V0

{14}

 

15K

GND

 

 

 

4Y

 

 

 

 

 

SN74HCT04PWR

 

 

 

{14} DCNEG14V

 

 

 

 

 

 

 

 

 

 

8

 

 

 

7

 

 

 

6

 

3

 

 

 

10

 

 

 

 

 

 

5K

 

 

R175

C109

R174

 

 

 

2

 

 

+

 

 

10K

 

 

 

 

15UF

 

 

 

1

+

 

 

4.7UF

 

 

 

1

2

C110

 

 

 

 

 

 

 

 

 

 

 

C111

 

 

 

 

 

+

 

 

 

 

 

15UF

 

 

 

 

 

5

 

 

U35

 

 

 

SN74HCT04D

 

 

1

 

Hex Inv

14

 

1A

VDD

 

2

 

 

1Y

 

13

REV

 

6A

 

 

3

2A

12

nREV

6Y

4

 

 

2Y

 

11

 

 

5A

 

 

 

 

 

 

10

 

5

 

5Y

 

3A

 

 

 

 

 

6

 

9

 

3Y

4A

 

 

8

 

7

 

4Y

 

 

 

 

GND

 

 

 

 

 

 

SN74HCT04PWR

 

 

4

 

 

 

3

DC5P5V

{6} LIGHT_PWR_ON

R152

0{3,8,10,11,12,14} VBATT

Layout Note:

VBATT ADD WIDE

ETCH

PXA250 Processor Reference Design

Size

B

Date:

Tuesday, February 05, 2002

2

J11

1

2

3

4

5

53261-0590

Rev 2.07

Sheet 13 of 16

1

A

Page 118
Image 118
Intel PXA250 and PXA210 manual LCD Cpld

PXA250 and PXA210 specifications

The Intel PXA250 and PXA210 processors, part of the Intel XScale architecture, were introduced in the early 2000s, targeting mobile and embedded applications. They are known for their low power consumption, high performance, and advanced multimedia capabilities, making them suitable for a wide range of devices, including PDAs, smartphones, and other portable computing devices.

The PXA250, which operates at clock speeds ranging from 400 MHz to 624 MHz, features a superscalar architecture that allows it to issue multiple instructions per clock cycle. This enhances the overall performance for demanding applications while maintaining low power usage. It supports a variety of peripheral interfaces, including USB, Ethernet, and various memory types, which contributes to its versatility in different product designs.

One of the key technologies in the PXA250 is the integrated Intel Smart Repeat Technology, which optimizes data processing, thereby reducing the amount of power consumed during operation. This feature is particularly important for battery-powered devices, as it extends the overall battery life, allowing for longer usage times in mobile environments. Additionally, the PXA250 includes a dedicated graphics acceleration unit, which enables enhanced graphics and multimedia performance suited to modern applications at the time.

In contrast, the PXA210 is a more entry-level processor, aimed at cost-sensitive applications. Operating at lower clock speeds, typically around 200 MHz to 400 MHz, it forgoes some of the advanced performance features of the PXA250 while still offering a good balance of performance and power efficiency. The PXA210 is less complex, making it suitable for simpler devices that do not require the extensive capabilities of the PXA250.

Both processors utilize the Intel XScale architecture, which is based on the ARM instruction set. They are built on a 0.13-micron process technology, enabling higher density and lower power consumption compared to their predecessors. With integrated memory controllers and bus interfaces, they facilitate efficient data handling and connectivity options.

In summary, both the Intel PXA250 and PXA210 processors played a crucial role in the evolution of mobile computing by providing powerful processing capabilities with energy efficiency. Their features and technologies enabled device manufacturers to create innovative products that catered to the growing demand for portable devices during that era.