Power and Clocking

Drive the PEXTAL pin with a digital signal that has a low level near 0 V and a high level near VCC. Do not exceed VCC or go below VSS by more than 100 mV. The minimum slew rate is 1 V per 100 ns. The maximum current drawn by the external clock source when the clock is at its maximum positive voltage should be about 1 mA.

Float the PXTAL pin or drive it complementary to the PEXTAL pin, using the same voltage level, slew rate, and input current restrictions. If floated, some degree of noise susceptibility will be introduced in the system, and it is therefore not recommended.

8.5Reset and Power AC Timing Specifications

The applications processor asserts the nRESET_OUT pin in one of several modes:

Power On

Hardware Reset

Watchdog Reset

GPIO Reset

Sleep Mode

The following sections give the timing and other specifications for the entry and exit of these modes.

8.5.1Power Supply Connectivity

The PXA250 applications processor requires two or three externally-supplied voltage levels. VCCQ requires high voltage, VCCN requires high or medium voltage, and VCC and PLL_VCC require low voltage. PLL_VCC must be separated from other low voltage supplies. Depending on the availability of independent regulator outputs and the desired memory voltage, VCCQ may have to be separated from VCCN. VCCN does not have to be separated at the board level.

Note: Shaded sections are not supported for the PXA210 applications processor.

Table 8-6. PXA250 and PXA210 VCCN vs. VCCQ (Sheet 1 of 6)

Pin

Pin

Alt_fn

Alt_fn

Alt_fn

Alt_fn

Signal Description and

Power

Count

1-(in)

2-(in)

1-(out)

2-(out)

Comments

Supply

 

 

 

 

 

 

 

 

 

MA(25:0)

26

 

 

 

 

Main Memory Address Bus

VCCN

 

 

 

 

 

 

 

 

MD(31:16)

16

 

 

 

 

Main Memory Data Bus (high)

VCCN

 

 

 

 

 

 

 

 

MD(15:0)

16

 

 

 

 

Main Memory Data Bus (low)

VCCN

 

 

 

 

 

 

 

 

nOE

1

 

 

 

 

Main Memory Bus Output Enable

VCCN

 

 

 

 

 

 

 

 

nWE

1

 

 

 

 

Main Memory Bus Write Enable

VCCN

 

 

 

 

 

 

 

 

nSDRAS

1

 

 

 

 

Main Memory Bus RAS

VCCN

 

 

 

 

 

 

 

 

nSDCAS

1

 

 

 

 

Main Memory Bus CAS

VCCN

 

 

 

 

 

 

 

 

DQM(3:2)

2

 

 

 

 

Main Memory Bus SDRAM byte

VCCN

 

 

 

 

selects

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8-6

PXA250 and PXA210 Applications Processors Design Guide

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Intel PXA250 and PXA210 manual Reset and Power AC Timing Specifications, Power Supply Connectivity

PXA250 and PXA210 specifications

The Intel PXA250 and PXA210 processors, part of the Intel XScale architecture, were introduced in the early 2000s, targeting mobile and embedded applications. They are known for their low power consumption, high performance, and advanced multimedia capabilities, making them suitable for a wide range of devices, including PDAs, smartphones, and other portable computing devices.

The PXA250, which operates at clock speeds ranging from 400 MHz to 624 MHz, features a superscalar architecture that allows it to issue multiple instructions per clock cycle. This enhances the overall performance for demanding applications while maintaining low power usage. It supports a variety of peripheral interfaces, including USB, Ethernet, and various memory types, which contributes to its versatility in different product designs.

One of the key technologies in the PXA250 is the integrated Intel Smart Repeat Technology, which optimizes data processing, thereby reducing the amount of power consumed during operation. This feature is particularly important for battery-powered devices, as it extends the overall battery life, allowing for longer usage times in mobile environments. Additionally, the PXA250 includes a dedicated graphics acceleration unit, which enables enhanced graphics and multimedia performance suited to modern applications at the time.

In contrast, the PXA210 is a more entry-level processor, aimed at cost-sensitive applications. Operating at lower clock speeds, typically around 200 MHz to 400 MHz, it forgoes some of the advanced performance features of the PXA250 while still offering a good balance of performance and power efficiency. The PXA210 is less complex, making it suitable for simpler devices that do not require the extensive capabilities of the PXA250.

Both processors utilize the Intel XScale architecture, which is based on the ARM instruction set. They are built on a 0.13-micron process technology, enabling higher density and lower power consumption compared to their predecessors. With integrated memory controllers and bus interfaces, they facilitate efficient data handling and connectivity options.

In summary, both the Intel PXA250 and PXA210 processors played a crucial role in the evolution of mobile computing by providing powerful processing capabilities with energy efficiency. Their features and technologies enabled device manufacturers to create innovative products that catered to the growing demand for portable devices during that era.