Intel PXA250 and PXA210 manual System Memory Interface, 1. General Memory Interface Configuration

System Memory Interface

Figure 2-1. General Memory Interface Configuration

PXA250

Memory

Controller

Interface

nSDCS<0>
		SDRAM Partition 0
nSDCS<1>
SDCLK<1>, SDCKE<1>		SDRAM Partition 1		SDRAM Memory Interface
nSDCS<2>				Up to 4 partitions of SDRAM
		SDRAM Partition 2		memory (16- or 32-bit wide)
nSDCS<3>
SDCLK<2>, SDCKE<1>		SDRAM Partition 3
DQM<3:0>
nSDRAS, nSDCAS
	MD<31:0>				Card Memory Interface
			Buffers and
MA<25:0>			Transceivers		Up to 2-socket support.
					Requires some
Card Control					external buffering.

nCS<0>

nCS<1>

nCS<2>

SDCLK<0>,SDCKE<0>

nCS<3>

nCS<4>

nCS<5>

RDY

Static Bank 0

Static Bank 1

Static Bank 2

Static Bank 3

Static Bank 4

Static Bank 5

Static Memory or

Variable Latency I/O Interface

Up to 6 banks of ROM, Flash, SRAM, Variable Latency I/O,

(16- or 32-bit wide)

NOTE:

Static Bank 0 must be populated by “bootable” memory

Synchronous Static Memory Interface

Up to 4 banks of synchronous static memory (nCS<3:0>).

(16- or 32-bit wide)

NOTE:

Static Bank 0 must be populated by “bootable” memory

2-2 PXA250 and PXA210 Applications Processors Design Guide