System Memory Interface
Table
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Symbol | Description |
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99.5 | 118.0 |
| 132.7 |
| 147.5 | 165.9 | Notes | ||
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tcardDH | MD(31:0) hold after nPWE, nPOE, | 10 | 8.5 |
| 7.5 |
| 6.8 | 6 | ns, 1 |
nPIOW, or NPIOR |
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tcardCMD | nPWE, nPOE, nPIOW, or nPIOR | 30 | 25.5 |
| 22.5 |
| 20.4 | 18 | ns, 1 |
command assertion |
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NOTE:
1.These numbers are minmums. They can be much larger based on the programmable Card Interface timing registers.
2.6.6DMA / Companion Chip Interface
Connect a companion chip to the applications processor via:
•Alternate Bus Master Mode
•Variable Latency I/O
•Flow through DMA
These connections are illustrated in Figure 2-6 and Figure 2-7.
PXA250 and PXA210 Applications Processors Design Guide |