SA-1110/Applications Processor Migration

You can program GPIO pins to generate various clocks in both the SA-1110 and the PXA250 applications processors. For example, these are often used in audio codec designs to generate clocks. The inter-relationships of some of these clocks have changed from the SA-1110 to the PXA250 applications processor. You may need to select different GPIO pins and program different configuration registers to provide similar functionality.

A.1.6 UCB1300

The SA-1110 supports a unique serial protocol for communication with the Philip’s UCB product family: UCB1100, 1200 and 1300. This serial interface is not available on the PXA250 applications processor. Instead the PXA250 applications processor supports several industry standard Audio codec Interfaces. You may also use I2S/I2C combinations and an AC’97 interface.

If an SA-1110 design utilizes this UCB interface then an alternative choice of components is necessary for the PXA250 applications processor.

A.2 SA-1110 to PXA250 Software Migration Issues

The difficulty of migrating software from the SA-1110 to the PXA250 applications processor depends on the amount of hardware and software interaction. SA-1110 applications running under an Operating System, which use device driver interfaces, should move seamlessly between the two devices.

There is one exception; any application that explicitly uses the Read Buffer to prefetch external memory data into the SA-1110. This buffer does not exist on the PXA250 applications processor and register #9 in Coprocessor #15 that was used to access it are not compatible to software.

As the Read Buffer prefetching activity was deemed to be a hint rather than an instruction, applications can simply delete all references to the Read Buffer and still function correctly. They may not even suffer a performance penalty, as the PXA250 ’hit-under-miss’ cache feature can turn the entire data space into a prefetchable region without any explicit software direction.

Alternately, as a patch for software that cannot be modified, all applications must be limited to User Mode execution, whereupon an Exception can be generated for all Coprocessor activity. Such an exception manager needs to filter out the Read Buffer coprocessor calls, or convert them to PXA250 PLD instructions that can preload a data cache value.

There are major software difference within the device initialization/configuration software and device drivers, such as low-level code that controls the hardware.

The PXA250 applications processor has enhanced functionality and extra instructions not found in the SA-1110. The PXA250 applications processor software is not backward compatibility to the SA-1110. Once code is compiled for the PXA250 applications processor it is unlikely to run on the SA-1110.

PXA250 and PXA210 Applications Processors Design Guide

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Intel PXA250 and PXA210 manual SA-1110 to PXA250 Software Migration Issues, 6 UCB1300
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PXA250 and PXA210 specifications

The Intel PXA250 and PXA210 processors, part of the Intel XScale architecture, were introduced in the early 2000s, targeting mobile and embedded applications. They are known for their low power consumption, high performance, and advanced multimedia capabilities, making them suitable for a wide range of devices, including PDAs, smartphones, and other portable computing devices.

The PXA250, which operates at clock speeds ranging from 400 MHz to 624 MHz, features a superscalar architecture that allows it to issue multiple instructions per clock cycle. This enhances the overall performance for demanding applications while maintaining low power usage. It supports a variety of peripheral interfaces, including USB, Ethernet, and various memory types, which contributes to its versatility in different product designs.

One of the key technologies in the PXA250 is the integrated Intel Smart Repeat Technology, which optimizes data processing, thereby reducing the amount of power consumed during operation. This feature is particularly important for battery-powered devices, as it extends the overall battery life, allowing for longer usage times in mobile environments. Additionally, the PXA250 includes a dedicated graphics acceleration unit, which enables enhanced graphics and multimedia performance suited to modern applications at the time.

In contrast, the PXA210 is a more entry-level processor, aimed at cost-sensitive applications. Operating at lower clock speeds, typically around 200 MHz to 400 MHz, it forgoes some of the advanced performance features of the PXA250 while still offering a good balance of performance and power efficiency. The PXA210 is less complex, making it suitable for simpler devices that do not require the extensive capabilities of the PXA250.

Both processors utilize the Intel XScale architecture, which is based on the ARM instruction set. They are built on a 0.13-micron process technology, enabling higher density and lower power consumption compared to their predecessors. With integrated memory controllers and bus interfaces, they facilitate efficient data handling and connectivity options.

In summary, both the Intel PXA250 and PXA210 processors played a crucial role in the evolution of mobile computing by providing powerful processing capabilities with energy efficiency. Their features and technologies enabled device manufacturers to create innovative products that catered to the growing demand for portable devices during that era.
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