Introduction

Table 1-3. Signal Pin Descriptions (Sheet 4 of 7)

Name

Type

Description

 

 

 

MMDAT

ICOCZ

Multimedia Card Data Pin (I/O)

 

 

 

MMCCLK/GP[6]

ICOCZ

MMC clock. (output) Clock signal for the MMC Controller.

 

 

 

MMCCS0/GP[8]

ICOCZ

MMC chip select 0. (output) Chip select 0 for the MMC Controller.

 

 

 

MMCCS1/GP[9]

ICOCZ

MMC chip select 1. (output) Chip select 1 for the MMC Controller.

 

 

 

SSP Pins

 

 

 

 

 

SSPSCLK/

ICOCZ

Synchronous Serial Port Clock (output)

GPIO[23]

See Note [2]

 

 

 

 

SSPSFRM/

ICOCZ

Synchronous serial port Frame Signal (output)

GPIO[24]

See Note [2]

 

 

 

 

SSPTXD/

ICOCZ

Synchronous serial port transmit (output)

GPIO[25]

See Note [2]

 

 

 

 

SSPRXD/

ICOCZ

Synchronous serial port receive (input)

GPIO[26]

See Note [2]

 

 

 

 

SSPEXTCLK/

ICOCZ

Synchronous Serial port external clock (input)

GPIO[27]

See Note [2]

 

 

 

 

USB Client Pins

 

 

 

 

 

USB_P

IAOA

USB Client port positive Pin of differential pair.

 

 

 

USB_N

IAOA

USB Client port negative Pin of differential pair.

 

 

 

AC97 Controller Pins

 

 

 

 

 

BITCLK/

ICOCZ

AC97 Audio Port bit clock (output)

GPIO[28]

See Note [2]

 

 

 

 

SDATA_IN0/

ICOCZ

AC97 Audio Port data in (input)

GPIO[29]

See Note [2]

 

 

 

 

SDATA_IN1/

ICOCZ

AC97 Audio Port data in (input)

GPIO[32]

See Note [2]

 

 

 

 

SDATA_OUT/

ICOCZ

AC97 Audio Port data out (output)

GPIO[30]

See Note [2]

 

 

 

 

SYNC/

ICOCZ

AC97 Audio Port sync signal (output)

GPIO[31]

See Note [2]

 

 

 

 

nACRESET

OC

AC97 Audio Port reset signal (output)

This pin is a dedicated output.

 

 

 

 

 

Standard UART and ICP Pins

 

 

 

 

IRRXD/

ICOCZ

IrDA Receive signal (input).

GPIO[46]

See Note [2]

 

 

 

 

IRTXD/

 

IrDA Transmit signal (output).

ICOCZ

Transmit pin for both the SIR and FIR functions.

GPIO[47]

 

See Note [2]

 

 

 

 

 

I2C Controller Pins

 

 

 

 

I2C clock (Bidirectional)

SCL

ICOCZ

Bidirectional signal. When it is driving, it functions as an open collector device and

 

 

requires a pull up resistor. As an input, it expects standard CMOS levels.

 

 

 

PXA250 and PXA210 Applications Processors Design Guide

1-7

Page 15
Image 15
Intel PXA250 and PXA210 manual Signal Pin Descriptions Sheet 4

PXA250 and PXA210 specifications

The Intel PXA250 and PXA210 processors, part of the Intel XScale architecture, were introduced in the early 2000s, targeting mobile and embedded applications. They are known for their low power consumption, high performance, and advanced multimedia capabilities, making them suitable for a wide range of devices, including PDAs, smartphones, and other portable computing devices.

The PXA250, which operates at clock speeds ranging from 400 MHz to 624 MHz, features a superscalar architecture that allows it to issue multiple instructions per clock cycle. This enhances the overall performance for demanding applications while maintaining low power usage. It supports a variety of peripheral interfaces, including USB, Ethernet, and various memory types, which contributes to its versatility in different product designs.

One of the key technologies in the PXA250 is the integrated Intel Smart Repeat Technology, which optimizes data processing, thereby reducing the amount of power consumed during operation. This feature is particularly important for battery-powered devices, as it extends the overall battery life, allowing for longer usage times in mobile environments. Additionally, the PXA250 includes a dedicated graphics acceleration unit, which enables enhanced graphics and multimedia performance suited to modern applications at the time.

In contrast, the PXA210 is a more entry-level processor, aimed at cost-sensitive applications. Operating at lower clock speeds, typically around 200 MHz to 400 MHz, it forgoes some of the advanced performance features of the PXA250 while still offering a good balance of performance and power efficiency. The PXA210 is less complex, making it suitable for simpler devices that do not require the extensive capabilities of the PXA250.

Both processors utilize the Intel XScale architecture, which is based on the ARM instruction set. They are built on a 0.13-micron process technology, enabling higher density and lower power consumption compared to their predecessors. With integrated memory controllers and bus interfaces, they facilitate efficient data handling and connectivity options.

In summary, both the Intel PXA250 and PXA210 processors played a crucial role in the evolution of mobile computing by providing powerful processing capabilities with energy efficiency. Their features and technologies enabled device manufacturers to create innovative products that catered to the growing demand for portable devices during that era.