Paradyne 8779, 8747, 8777, Hotwire M/SDSL and HDSL2 Termination Units Figure A-1. System Timing

Configuration Options

When a system clock source fails or is misconfigured, an alarm is reported. Secondary clock failures are not reported unless the primary clock has also failed. When the primary clock fails, clocking is switched to the secondary clock source, if available. If a secondary clock is not available, the clock switches to secondary holdover mode. In holdover mode, the system attempts to generate timing which is consistent with the last clock reference. A switch is made back to the primary clock when it becomes available.

Figure A-1 shows clocking in an LTU.

DSL

Transceiver

Framer

Cross-Connect

Framer

DSX-1/

G.703 Driver

System Timing

System

Timing

Module

DSX-1/G.703 Port
Internal Oscillator	99-16627

Figure A-1. System Timing

Figure A-2 shows sample system clock configurations.

A-14 April 2000 8700-A2-GB20-00