IPmux-1/1E Installation and Operation Manual Chapter 1 Introduction
Functional Description 1-13

FXS/FXO/E&M

The TS assignment in a bundle with analog (FXS/FXO/E&M) is straightforward. Each
timeslot in a bundle is assigned to a specific analog channel according to analog
channel numbers; the first timeslot is assigned to the lowest analog channel that is
configured, etc.
The E1/T1 TDMoIP gateway that works opposite the analog channels should work in
Framed with CAS mode.
Testing
Diagnostic capabilities include E1/T1 or ISDN BRI S local and remote loopback
tests for rapid localization of faults. The E1/T1 or ISDN BRI S channel can be
looped locally, toward the line, or toward the remote end (see Chapter 4 for more
information).
Remote Loopback and Tone Injection are available for the FXS/FXO/E&M port.
Timing Modes
The E1/T1 Tx clock, or ISDN/FXS PCM clock, can operate in several timing modes
to provide maximum flexibility for connecting the IPmux-1/1E E1, T1, ISDN or
FXS/FXO/E&M channels.
Each of the clocks must be configured correctly on both the Receive and Transmit
ends to ensure proper operation and prevent pattern slips (see Figure 1-11,
Figure 1-13, and Figure 1-14).

E1/T1

The E1/T1 available Tx modes are:
• Loopback Timing – the E1/T1 Tx clock is derived from the E1/T1 receive (Rx)
clock.
• Adaptive Timing – in this mode, the E1 or T1 Tx clock is regenerated using the
Adaptive method. In this method, the fill level of the buffer receiving packets is
monitored. If the buffer begins to overfill, the regenerated Tx clock frequency
increases to avoid overflow. If the buffer begins to empty, the Tx clock (toward
the TDM device) decreases to avoid underflow.
• Internal Clock Timing – in this mode, the Tx clock is received from an internal
oscillator.
• External Clock Timing – in this mode the Tx clock is taken from the external
clock input (Ordering option). The external clock port also outputs the input
clock signal to allow connection to other units, if needed.
In Adaptive Timing mode the regenerated clock is subject to network Packet Delay
Variation and may not comply with jitter and wander specifications.
Note
Note