Figure 2 Mixed DIMM load order
Table 6 DIMM pair load order
| CPU0 |
|
| CPU1 |
1st | 3A | 4A | — | — |
2nd | 9B | 10B | — | — |
3rd | 1C | 6C | — | — |
CPU0 only | 7D | 12D | — | — |
4th | ||||
5th | 2E | 5E | — | — |
6th | 8F | 11F | — | — |
1st | 3A | 4A | — | — |
2nd | — | — | 1A | 7A |
3rd | 9B | 10B | — | — |
4th | — | — | 6B | 10B |
5th | 1C | 6C | — | — |
6th | — | — | 3C | 9C |
Both CPUs loaded |
|
|
|
|
7th | 7D | 12D | — | — |
8th | — | — | 4D | 12D |
9th | 2E | 5E | — | — |
10th | — | — | 2E | 8E |
11th | 8F | 11F | — | — |
12th | — | — | 5F | 11F |
