Panasonic 1200N manual DS3 Frame Format

Hardware Interface Line Interface

16 -bit 84-bit

680-bit

X

INFO .P YLD .

F1

INFO .P YLD .

C

INFO .P YLD .

F0

C

F0

C

INFO .P YLD .

X

INFO .P YLD .

F1

INFO .P YLD .

C

INFO .P YLD .

F0

C

F0

C

INFO .P YLD .

P

INFO .P YLD .

F1

INFO .P YLD .

C

INFO .P YLD .

F0

C

F0

C

INFO .P YLD .

Subfram e

P

INFO .P YLD .

F1

INFO .P YLD .

C

INFO .P YLD .

F0

C

F0

C

INFO .P YLD .

M 0

INFO .P YLD .

F1

INFO .P YLD .

C

INFO .P YLD .

F0

C

F0

C

INFO .P YLD .

M 1

INFO .P YLD .

F1

INFO .P YLD .

C

INFO .P YLD .

F0

C

F0

C

INFO .P YLD .

M 0

INFO .P YLD .

F1

INFO .P YLD .

C

INFO .P YLD .

F0

C

F0

C

INFO .P YLD .

7 Subfram e, each with 680 bits = 1 M -Fram e with 4760 bytes

INFO .P YLD .(Inform ation Payload)= 4704 bytes available for the PLCP

Each INFO .PY LD .block = 84 bits

The sym bol . . . represents an INFO .PY LD .block

...

X, Fn (where n = 1001), C, P, M n (where n = 010) = D S3 O verhead Bit

Figure 6-6: DS3 Frame Format

P L C P	F ra m in g	P O I	P O H	P L C P P ay lo ad
0 µ s e c
A 1	A 2	P 11	Z 6		F irst AT M C ell
A 1	A 2	P 1 0	Z 5			AT M C ell
A 1	A 2	P 9	Z 4			AT M C ell
A 1	A 2	P 8	Z 3			AT M C ell
A 1	A 2	P 7	Z 2			AT M C ell
A 1	A 2	P 6	Z 1			AT M C ell
A 1	A 2	P 5	X			AT M C ell
A 1	A 2	P 4	B 1			AT M C ell
A 1	A 2	P 3	G 1			AT M C ell
A 1	A 2	P 2	X			AT M C ell
A 1	A 2	P 1	X			AT M C ell
A 1	A 2	P 0	C 1	Tw elfth AT M C ell
						5 3 o ctets

P O I : P ath O v erh ead In d icato r

P O H : P ath O v erh ead

B IP 8 : B it In terleav ed P arity - 8

X : U n assig n ed

Figure 6-7: DS3 PLCP Frame Format

Centillion 1200N ATM Switch User Manual	6-7
NTP 297-8103-903