Software Specifications | Traffic Management |
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Congestion Control
Priority Control
Shaping
In the ATM Switch, congestion is controlled by applying a back pressure in the direction of line output unit » switch » line input unit and restricting the number of incoming cells. The ATM Switch also supports congestion control using Explicit Forward Congestion Indicator (EFCI) and RM (Resource Management) cell.
Furthermore, the ATM Switch controls congestion from ABR/UBR class traffic by using EPD (Early Packet Discard), or a function that discards cells in frame increments when the input buffer is congested.
The ATM Switch performs the five classes of controls below on traffic delay:
■CBR (Constant Bit Rate service)
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■ABR (Available Bit Rate service)
■UBR (Unspecified Bit Rate service)
In this list, the higher the control, the better the delay characteristics. Priority is given to CBR and
These delay priorities can be selected for each connection when establishing the connection.
In the switch, a cell delay of no less than 40 µsec occurs depending on the degree of passing cell congestion and the degree of priority.
The ATM Switch performs two classes of controls on cell loss. Cell loss priority control is performed in cell increments based on the CLP bit value in the header of each cell. The definition of CLP bit value is as follows:
■CLP bit "0" (high priority)
■CLP bit "1" (low priority)
In the ATM Switch, to ensure traffic quality, every line card shares one input buffer (32,000 cell capacity) and one output buffer (32,000 cell capacity).
Shaping is a function that schedules cell transfer so it complies with the communication rate and traffic parameters declared by each connection. This function ensures that even bursty data are transferred at a consistent rate without being discarded and that the network bands are used efficiently.
The ATM Switch allows one of eight stages of shaping to be set for each port.
Centillion 1200N ATM Switch User Manual | |
NTP |
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