S3F80JB

INSTRUCTION SET

 

 

BXOR — Bit XOR

BXOR dst,src.b

BXOR dst.b,src

Operation: dst(0) dst(0) XOR src(b) or

dst(b) dst(b) XOR src(0)

The specified bit of the source (or the destination) is logically exclusive-ORed with bit zero (LSB) of the destination (or source). The result bit is stored in the specified bit of the destination. No other bits of the destination are affected. The source is unaffected.

Flags:

C:

Unaffected.

 

Z:

Set if the result is "0"; cleared otherwise.

 

S:

Cleared to "0".

 

V:

Undefined.

D: Unaffected.

H: Unaffected.

Format:

Bytes Cycles Opcode

Addr Mode

(Hex)

dst src

opc

dst b 0

src

3

6

27

r0

Rb

opc

src b 1

dst

3

6

27

Rb

r0

NOTE: In the second byte of the 3-byte instruction formats, the destination (or source) address is four bits, the bit address 'b' is three bits, and the LSB address value is one bit in length.

Examples: Given: R1 = 07H (00000111B) and register 01H = 03H (00000011B):

BXOR

R1,01H.1

R1 = 06H, register 01H = 03H

BXOR

01H.2,R1

Register 01H = 07H, R1 = 07H

In the first example, destination working register R1 has the value 07H (00000111B) and source register 01H has the value 03H (00000011B). The statement "BXOR R1,01H.1" exclusive-ORs bit one of register 01H (source) with bit zero of R1 (destination). The result bit value is stored in bit zero of R1, changing its value from 07H to 06H. The value of source register 01H is unaffected.

6-25

Page 153
Image 153
Samsung S3F80JB manual Bxor Bit XOR, R1,01H.1 R1 = 06H, register 01H = 03H