Samsung S3F80JB manual Cacon Counter a Control Register F3H Set1 Bank0

CONTROL REGISTERSS3F80JB

CACON — Counter A Control Register F3H Set1 Bank0

Bit Identifier

Reset Value

Read/Write

Addressing Mode

.7 and .6

.7	.6	.5	.4	.3	.2	.1	.0
0	0	0	0	0	0	0	0
R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W

Register addressing mode only

Counter A Input Clock Selection Bits

00 fOSC

01 fOSC/2

10 fOSC/4

11 fOSC/8

.5 and .4	Counter A Interrupt Timing Selection Bits
	0	0	Elapsed time for Low data value
	0	1	Elapsed time for High data value
	1	0	Elapsed time for combined Low and High data values
	1	1	Not used for S3F80JB.

.3	Counter A Interrupt Enable Bit
	0	Disable interrupt
	1	Enable interrupt
.2	Counter A Start Bit
	0	Stop counter A
	1	Start counter A
.1	Counter A Mode Selection Bit
	0	One-shot mode
	1	Repeating mode
.0	Counter A Output Flip-Flop Control Bit
	0	Flip-Flop Low level (T-FF = Low)
	1	Flip-flop High level (T-FF = High)

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