RESET

S3F80JB

 

 

BACK-UP MODE

For reducing current consumption, S3F80JB goes into Back-up mode. If external reset pin is low state or a falling level of VDD is detected by LVD circuit on the point of VLVD, chip goes into the back-up mode. Because CPU and peripheral operation were stopped due to oscillation stop, the supply current is reduced. In back-up mode, chip cannot be released from stop state by any interrupt. The only way to release back-up mode is the system-reset operation by interactive work of reset pin and LVD circuit. The system reset of watchdog timer is not occurred in back up mode.

 

 

 

 

 

 

 

 

Rising Edge

 

 

LVD

 

Detector

 

 

 

 

 

 

 

 

 

 

Falling Edge

 

 

 

 

Detector

 

 

 

 

 

 

 

 

 

 

 

 

 

nRESET

 

 

Noise

 

 

 

 

 

 

Filter

 

 

 

 

 

VD D < = VLVD

 

Vreset< = VIL

Back-Up Mode

Figure 8-7. Block Diagram for Back-up Mode

Voltage [V]

VDD

VLVD

 

 

Slope of nRESET & VDD Pin

 

Rising edge detected

 

 

(VDD >= VLVD)

 

Low level

 

Reset Pulse generated,

detect voltage

 

 

oscillation starts

Falling edge detected,

 

 

 

oscillation stop.

 

 

(VDD < VLVD)

 

 

Normal Operation

Back up Mode

Normal Operation

NOTES:

 

 

1, When the rising edge is detected by LVD circuit, Back-up mode is relesased. (VLVD = VDD) 2. When the falling edge is detected by LVD circuit, Back-up mode is activated (VLVD > VDD)

Figure 8-8. Timing Diagram for Back-up Mode Input and Released by LVD

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Samsung S3F80JB manual BACK-UP Mode, Block Diagram for Back-up Mode