Samsung S3F80JB manual 13-1

S3F80JB TIMER 2

13 TIMER 2

OVERVIEW

The S3F80JB microcontroller has a 16-bit timer/counter called Timer 2 (T2). For universal remote controller applications, timer 2 can be used to generate the envelope pattern for the remote controller signal. Timer 2 has the following components:

—One control register, T2CON (E8H, Set 1, Bank1, R/W)

—Two 8-bit counter registers, T2CNTH and T2CNTL (E4H and E5H, Set1, Bank1, Read only)

—Two 8-bit reference data registers, T2DATAH and T2DATAL (E6H and E7H, Set 1, Bank1, R/W)

—One 16-bit comparator

You can select one of the following clock sources as the timer 2 clock:

—Oscillator frequency (fOSC) divided by 4, 8, or 16

—Internal clock input from the counter A module (counter A flip/flop output)

You can use Timer 2 in three ways:

—As a normal free run counter, generating a timer 2 overflow interrupt (IRQ3, vector F0H) at programmed time intervals.

—To generate a timer 2 match interrupt (IRQ3, vector F2H) when the 16-bit timer 2 count value matches the 16-bit value written to the reference data registers.

—To generate a timer 2 capture interrupt (IRQ3, vector F2H) when a triggering condition exists at the P3.2 pin for 44 package; at the P3.0 for 32 package (You can select a rising edge, a falling edge, or both edges as the trigger).

In the S3F80JB interrupt structure, the timer 2 overflow interrupt has higher priority than the timer 2 match or capture interrupt.

NOTE

The CPU clock should be faster than timer 2 clock.

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