Samsung S3F80JB manual POWER-DOWN Modes, Idle Mode Release

S3F80JB RESET

POWER-DOWN MODES

The power down mode of S3F80JB are described following that:

—Idle mode

—Back- up mode

—Stop mode

IDLE MODE

Idle mode is invoked by the instruction IDLE (op-code 6FH). In Idle mode, CPU operations are halted while some peripherals remain active. During Idle mode, the internal clock signal is gated away from the CPU and from all but the following peripherals, which remain active:

—Interrupt logic

—Basic Timer

—Timer 0

—Timer 1

—Timer 2

—Counter A

—Comparator

I/O port pins retain the state (input or output) they had at the time Idle mode was entered.

IDLE Mode Release

You can release Idle mode in one of two ways:

1.Execute a reset. All system and peripheral control registers are reset to their default values and the contents of all data registers are retained. The reset automatically selects the slowest clock (1/16) because of the hardware reset value for the CLKCON register. If all interrupts are masked in the IMR register, a reset is the only way you can release Idle mode.

2.Activate any enabled interrupt; internal or external. When you use an interrupt to release Idle mode, the 2-bit CLKCON.4/CLKCON.3 value remains unchanged, and the currently selected clock value is used. The interrupt is then serviced. When the return-from-interrupt condition (IRET) occurs, the instruction immediately following the one which initiated Idle mode is executed.

NOTE

Only external interrupts built in to the pin circuit can be used to release stop mode. To release Idle mode, you can use either an external interrupt or an internally-generated interrupt.

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