Xilinx V2.1 Valid and Invalid Data, Port Data Types, The Nature of Signals in the Xilinx Blockset

Models: V2.1

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Valid and Invalid Data

Xilinx Blockset Overview

As an example, the figures shown below depict the Xilinx Negate block parameters dialog box with full and user defined precision. Note in the latter case the additional options for selecting quantization and overflow behavior.

Figure 2-2: User-Defined Precision Options (available if selected instead of full precision)

Valid and Invalid Data

In the Xilinx Blockset portion of a Simulink model, every data sample is accompanied by a handshake validation signal. In the corresponding hardware, every data-carrying bus has a companion net that carries a valid or invalid status indicator. This is a commonly used handshaking mechanism. There are different circumstances under which the status indicator may be set to invalid. For example, invalid data might mean that a pipeline has not yet filled up, or it may denote bursty outputs, as with an FFT. Blocks in the Xilinx Blockset can use this valid bit signal to determine what to do with the input data. Some of the Xilinx blocks, for example, the storage blocks and the FFT, use the valid bit to determine when to store input data.

Port Data Types

Selecting the Port Data Types option (under the Format menu in the Simulink window) shows the data type and precision of a signal. An example port data type string is Fix_11_9, which indicates that the signal is a signed 11-bit number with the binary point 9 bits from the right side. Similarly, an unsigned signal is indicated by the UFix_ prefix.

The Nature of Signals in the Xilinx Blockset

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Xilinx V2.1 manual Valid and Invalid Data, Port Data Types, The Nature of Signals in the Xilinx Blockset