Xilinx V2.1 Puncture, Xilinx System Generator v2.1 Reference Guide, Xilinx Development System

Xilinx System Generator v2.1 Reference Guide

The Core datasheet can be found on your local disk at:

%XILINX%\coregen\ip\xilinx\eip1\com\xilinx\ip\sid_v1_1\doc\sid

.pdf

This is a licensed core, available for purchase on the Xilinx web site at:

http://www.xilinx.com/ipcenter/interleaver

Puncture

The Xilinx Puncture block allows you to remove arbitrary bits specified as a puncture code from your input data and create a new value. This value is presented as the output from the block. The Xilinx puncture block accepts data of type UFixN_0 (where N is equal to the length of

the puncture code) and outputs data of type UFixK_0 (where K is equal to the number of ones in the puncture code).

The Xilinx Puncture block can be used to implement a range of punctured convolution codes. The following diagram illustrates an application of this block.

Figure 3-37: Example of a Puncture block application

The preceding diagram shows a 1/2 rate Convolutional Encoder block connected to a binary input signal source. The slice blocks separate the convolution code output over the two branches. The output of the slice block is connected to a Serial to Parallel block which concatenates the output of the convolution code to form a 3-bit word. The puncture block removes the center bit for code 0 ( [1 0 1] ) and LSB bit for code 1

( [1 1 0 ] ) to produce a 2-bit punctured output which is again serialized to be connected to the I and Q channel for baseband shaping.

58 Xilinx Development System