Xilinx Blocks
∙Scaling Factor: Scaling factor for the generator polynomial root index. Normally h is 1; however, it can be any positive integer between 1 and
∙Provide Start Pin: when checked, the block has optional start input pin.
∙Enable Erasure Decoding: when checked, the block has optional pins erase at the input and erase_cnt at the output.
Other parameters used by this block are described in the Common Parameters section of the previous chapter.
The RS Decoder block cannot be placed in an enabled subsystem in System Generator v2.1. See the Enabled Subsystems section (within the MATLAB I/O library documentation) explanation for more details.
Latency
The RS Decoder block always accepts continuous code blocks. The same RS Decoder core is sometimes overclocked using the core’s Clock Periods Per Symbol parameter. In a multirate system, the Clock Periods Per Symbol is set to the maximum of the rate of decoder block and the number of Clock Periods Per Symbol required to support continuous code blocks. The latency of the decoder in sample periods is dependent on the values of n, error correcting capacity of the code and Clock Periods Per Symbol set by the block. The latency of the RS decoder block is always equal to the latency returned by the RS Decoder core + 3.
Xilinx LogiCore
The RS Decoder block uses Xilinx LogiCORE: RS Decoder v2.0.
The Core datasheet can be found on your local disk at:
%XILINX%\coregen\ip\xilinx\eip1\com\xilinx\ip\rs_decoder_v2_0\ doc\rs_decoder.pdf
This is a licensed core, available for purchase on the Xilinx web site at:
http://www.xilinx.com/ipcenter/reed_solomon
RS Encoder
A typical system is shown below:
Figure
The
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