Xilinx System Generator v2.1 Reference Guide
Chapter 1
Introduction
This chapter describes the basic concepts and tools of the System Generator v2.1.
This chapter contains the following sections.
∙Industry and Product Overview
∙System Generator
∙System Level Modeling with System Generator
∙The System Generator Design Flow
∙Arithmetic Data Types
∙Hardware Handshaking
∙
Industry and Product Overview
In recent years,
For example, all major telecommunication providers have adopted FPGAs for high- performance DSP out of necessity. A
Despite these characteristics, broader acceptance of FPGAs in the DSP community has historically been hampered by several factors. First, there is a general lack of familiarity with hardware design and especially, FPGAs. DSP engineers conversant with programming in C or assembly language are often unfamiliar with digital design using hardware description languages (HDLs) such as VHDL or Verilog. Furthermore, although VHDL provides many high level abstractions and language
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