Xilinx V2.1 manual Block Interface, Xilinx Blocks, 46:Pipelined decimator and interpolator

Xilinx Blocks

Block Interface

The CIC Block has one input and one output port. The input port can be between 1 and 32 bits (inclusive).

The two basic building blocks of a CIC filter are the integrator and the comb. A single integrator is a single-pole IIR filter with a transfer function of:

H(z) = (1 – z-1)-1

The integrator’s unity feedback coefficient is y[n] = y[n-1] + x[n].

A single comb filter is an odd-symmetric FIR filter described by:

y[n] = x[n] – x[n – RM]

M is the differential delay selected in the block parameterization GUI, and R is the selected integer rate change factor. The transfer function for a single comb stage is

H(z) = 1 –z-RM

As seen in the two figures below, the CIC filter cascades N integrator sections together with N comb sections. To keep the integrator and comb structures independent of rate change, a rate change block (i.e., an up-sampler or down-sampler) is inserted between the sections. In the interpolator, the up-sampler causes a rate increase by a factor of R by inserting R-1 zero-valued samples between consecutive samples of the comb section output. In the decimator, the down-sampler reduces the sample rate by a factor of R by taking subsamples of the output from the last integrator stage.

Figure 3-46: Pipelined decimator and interpolator

DSP 71