Xilinx V2.1 manual yn = ∑ hixn –i, Block Interface, Xilinx Blocks

Xilinx Blocks

The Dual Port Block Memory LogiCORE datasheet can be found on your local disk at:

%XILINX%\coregen\ip\xilinx\eip1\com\xilinx\ip\blkmemdp_v3_2\do c\dp_block_mem.pdf

FIR

The Xilinx FIR Filter Block implements a finite-impulse response (FIR) digital filter, or a bank of identical FIR filters (multichannel mode). An N-tap filter is defined by N filter coefficients (or taps) h(0), h(1), ....,h(n-

1). Here each h(i) is a Xilinx fixed point number.

The filter block accepts a stream of Xilinx fixed point data samples x(0), x(1), ..., and at time n computes the output:

N–1

y(n) = ∑ h(i)x(n –i)

i = 0

Block Interface

The FIR block takes one to eight inputs, xi(n): i Xilinx Blockset signal fixed point data samples.

The block produces the same number of output signals, yi(n): i Xilinx Blockset fixed point samples.

DSP 79